TDA7421 datasheet(15/38 Pages) STMICROELECTRONICS

15 / 38 page

FM SECTION

Featuring a single conversion configuration, it

comprises a multi-stage IF limiter whose gain is

2C controlled and a quadrature demodulator with

detuning and adjacent channel detectors. Signal

meter and stop station functions are also sup-

ported

AM SECTION

AM signal is converted by means of UP-DOWN

configuration (IF1 = 10.7MHz, IF2 = 450KHz) and

MW/LW bands are covered.

PLL SECTION

Three operating modes are available:

PM0

PM1

Operating Mode

Standby

not used

They are user programmable with the mode PM

registers.

Standby mode

It stops all functions. This allows low current con-

sumption without loss of information in all regis-

ters. The pin LP-OUT is forced to 0V in power on.

All data registers are set to FE (11111110). The

oscillator runs even in stand-by mode.

FM and AM Operation

The FM or AM signal applies to a 32/33 pres-

caler, which is controlled by a 5 bit counter (A).

The 5 bit register (PC0 to PC4) controls this di-

vider.

The output of the prescaler connects to a 11 bit

divider (B). The 11 bit register (PC5 to PC15)

controls the divider ’B’.

THREE STATE PHASE COMPARATOR

The phase comparator generates a phase error

signal according to phase difference between

fSYN and fREF. This phase error signal drives the

charge pump current generator.

CHARGE PUMP CURRENT GENERATOR

This stage generates signed pulses of current.

The phase error signal decides the duration and

polarity of those pulses.

The current absolute values are programmable

by A0, A1, A2 registers for high current and B0,

B1 registers for low current.

LOW NOISE CMOS OP-AMP

An internal voltage divider at pin VREF connects

the positive input of the low noise Op-Amp.

The charge pump output connects the negative

input. This internal amplifier in cooperation with

external components can provide an active filter.

The negative input is switchable to three input

pins (LPIN 1, LPIN 2 and LPIN 3), to increase the

flexibility in application.

This feature allows two separate active filters for

different applications.

A logical "1" in the LPIN 1/2 register activates pin

LPIN 1, otherwise pin LPIN 2 is active. While the

high current mode is activated LPIN 3 is switched

on.

INLOCK DETECTOR

The charge pump is switched in low current mode

as the truth table and the related figure shows.

CURRHIGH

LOCKENA

LOCK

(by inlock

detector)

Charge

Pump

Current

low current

High current

The charge pump is forced in low current mode

when a phase difference of 10-40 usec is

reached.

A phase difference larger than the programmed

values will switch the charge pump immediately in

the high current mode.

Few programmable delays are available for inlock

detection.

IF COUNTER SYSTEM FOR AM/FM

The IF counter mode is controlled by IFCM register:

IFCM1

IFCM0

FUNCTION

NOT USED

FM MODE

AM MODE

NOT USED

A sample timer to generate the gate signal for the

main counter is built with a 14 bit programmable

counter to have the possibility to use any fre-

TDA7421

15/38

TDA7421 数据表(PDF) 15 Page - STMicroelectronics

TDA7421 数据表(HTML) 15 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38

数据表下载