PIN FUNCTIONS

N.

Name

Type

Description

1

EMI_AD5

I/O

EMI Multiplexed Address/Data Line 5. these pin acts as the EMI multiplexed

address and data line 5

2

EMI_AD6

I/O

EMI Multiplexed Address/Data Line 6. these pin acts as the EMI multiplexed

address and data line 6

3

VDD

I

Digital power supply

4

GND

I

Ground

5

EMI_AD7

I/O

EMI Multiplexed Address/Data Line 7. these pin acts as the EMI multiplexed

address and data line 7

6

EMI_A8

O

EMI Address Line 8. these pin acts as the EMI address line 8. The interface is

designed to address up to 4 Mbytes of External Flash, EPROM or SRAM.

7

EMI_A9

O

EMI Address Line 9. these pin acts as the EMI address line 9.

8

EMI_A10

O

EMI Address Line 10. these pin acts as the EMI address line 10.

9

EMI_A11

O

EMI Address Line 11. these pin acts as the EMI address line 11.

10

EMI_A12

O

EMI Address Line 12. these pin acts as the EMI address line 12.

11

EMI_A13

O

EMI Address Line 13. these pin acts as the EMI address line 13.

12

EMI_A14

O

EMI Address Line 14. these pin acts as the EMI address line 14.

13

EMI_A15

O

EMI Address Line 15. these pin acts as the EMI address line 15.

14

VDD

I

Digital power supply

15

GND

I

Ground

16

EMI_A16

O

EMI Address Line 16. these pin acts as the EMI address line 16.

17

EMI_A17

O

EMI Address Line 17. these pin acts as the EMI address line 17.

18

EMI_A18

O

EMI Address Line 18. these pin acts as the EMI address line 18.

19

EMI_A19

O

EMI Address Line 19. these pin acts as the EMI address line 19.

20

EMI_A20

O

EMI Address Line 20. these pin acts as the EMI address line 20.

21

EMI_A21

O

EMI Address Line 21. these pin acts as the EMI address line 21.

22

DWRN

O

EMI Write Enable. This pin serves as the write enable for the EMI

23

TEST1

I

Test 1. Used for test: set to LOW for normal operation

24

TEST2

I

Test 2. Used for test: set to HIGH for normal operation

25

MISO

I/O

SPI Master Output Slave Input Serial Data. Serial Data Output for SPI type serial

Port when in SPI master Mode and Serial Data Input when in SPI Slave Mode

26

MOSI

I/O

SPI Master Input Slave Output Serial Data. Serial Data Input for SPI type serial

Port when in SPI master Mode and Serial Data Output when in SPI Slave Mode

27

VDD

I

Digital Power Supply

28

GND

I

Ground

29

TEST3

I

Test 3. Used for test: set to LOW for normal operation

30

SDI

I

SAI Data Input

31

SCK

I/O

SAI Bit Clock

32

LRCK

I/O

SAI Left/Right Clock

33

VDD

I

Digital power supply

34

GND

I

Ground

35

SDO

O

SAI Data Output

TDA7550R - TDA7550 - TDA7551 - TDA7552 - TDA7553

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