TDA9105 datasheet(17/32 Pages) STMICROELECTRONICS

17 / 32 page

H Osc

Sawtooth

H Drive

1.6V

6.4V

0.75T

0.25T

Duty Cycle

Internally

Shaped Flyback

Flyback

The duty cycle of H-drive is adjustable between 30% and 50%.

Figure 13 : PLL2 Timing Diagram

20k

Ω

GND 0V

HFLY

400

Ω

Figure 14 : Flyback Input Electrical Diagram

OPERATING DESCRIPTION (continued)

PLL2

The PLL2 ensures a constant position of the

shaped flyback signal in comparison with the saw-

tooth of the VCO (see Figure 13).

The phase comparator of PLL2 is followed by a

charge pump with a

±0.5mA (typ.) output current.

The flyback input is composed of an NPN transistor.

This input has to be current driven.

The maximum recommanded input current is 2mA

(see Figures 14 and 15).

C Lockdet

LOCKDET

COMP1

INPUT

INTERFACE

CHARGE

PUMP

PLL

INHIBITION

VCO

PHASE

ADJUST

PLL1INHIB

Horizontal

Adjust

R0 C0

Filter

High

Low

3.2V

OSC

COMP2

CHARGE

PUMP

High

Low

RAP

CYC

Adjust

Rapcyc

Cap

PHi2

PWM

LOGI

PWM

BUFFER

FLYBACK

SortCOLL

Flyback

SortEM

Horizontal

Input

11 10

HLOCKOUT

Figure 15 : Dual PLL Block Diagram

TDA9105

17/32

TDA9105 数据表(PDF) 17 Page - STMicroelectronics

TDA9105 数据表(HTML) 17 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

数据表下载