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TDA9113 数据表(PDF) 24 Page - STMicroelectronics |
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TDA9113 数据表(HTML) 24 Page - STMicroelectronics |
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24 / 50 page ![]() TDA9113 24/50 Sad07/D7 - BOutPh Phase of start of B+ drive signal on BOut pin 0: Just after horizontal flyback pulse 1: With one of edges of line drive signal on HOut pin, selected by BOHEdge bit Sad08/D7 - EWTrHFr Tracking of all corrections contained in wave- form on pin EWOut with Horizontal Frequency 0: Not active 1: Active Sad15/D7 - VDyCorPol Polarity of Vertical Dynamic Correction wave- form (parabola) 0: Concave (minimum in the middle of the pa- rabola) 1: Convex (maximum in the middle of the pa- rabola) Sad16/D0 - HLockEn Enable of output of Horizontal PLL1 Lock/unlock status signal on pin HLckVBk 0: Disabled, vertical blanking only on the pin HLckVBk 1: Enabled Sad16/D1 - PLL1InhEn Enable of Inhibition of horizontal PLL1 during extracted vertical synchronization pulse 0: Disabled, PLL1 is never inhibited 1: Enabled Sad16/D2 - PLL1Pump Horizontal PLL1 charge Pump current 0: Slow PLL1, low current 1: Fast PLL1, high current Sad16/D4 - SDetReset Reset to 0 of Synchronization Detection flags VDet, HVDet and VExtrDet of status register ef- fected with ACK bit of I2C Bus data transfer into register containing the SDetReset bit. Also see description of the flags. 0: No effect 1: Reset with automatic return of the bit to 0 Sad16/D5 - VSyncSel Vertical Synchronization input Selection be- tween the one extracted from composite HV sig- nal on pin H/HVSyn and the one on pin VSyn. No effect if VSyncAuto bit is at 1. 0: V. sync extracted from composite signal on H/HVSyn pin selected 1: V. sync applied on VSyn pin selected Sad16/D6 - VSyncAuto Vertical Synchronization input selection Auto- matic mode. If enabled, the device automatically selects between the vertical sync extracted from composite HV signal on pin H/HVSyn and the one on pin VSyn, based on detection mecha- nism. If both are present, the one coming first is kept. 0: Disabled, selection done according to bit VSyncSel 1: Enabled, the bit VSyncSel has no effect Sad16/D7 - XRayReset Reset to 0 of XRay flag of status register effect- ed with ACK bit of I 2C Bus data transfer into reg- ister containing the XRayReset bit. Also see de- scription of the flag. 0: No effect 1: Reset with automatic return of the bit to 0 Sad17/D0 - BlankMode Blanking operation Mode 0: Blanking pulse starting with detection of vertical synchronization pulse and ending with end of vertical oscillator discharge (start of vertical sawtooth ramp on the VOut pin) 1: Permanent blanking - high blanking level in composite signal on pin HLckVBk is per- manent Sad17/D1 - VOutEn Vertical Output Enable 0: Disabled, VoffVOut on VOut pin (see 6.5 - Vertical section) 1: Enabled, vertical ramp with vertical position offset on VOut pin |
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