ADA4817-2ACPZ-R2 datasheet(14/24 Pages) AD

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ADA4817-1/ADA4817-2

Rev. 0 | Page 14 of 24

The voltage error due to Ib+ and Ib– is minimized if RS = RF || RG

(though with the ADA4817-1/ADA4817-2 input currents in the

picoamp range, this is likely not a concern). To include common-

mode effects and power supply rejection effects, total VOS can be

modeled by

CMR

PSR

nom

(11)

where:

is the offset voltage specified at nominal conditions.

ΔVS is the change in power supply from nominal conditions.

PSR is the power supply rejection.

ΔVCM is the change in common-mode voltage from nominal

conditions.

CMR is the common-mode rejection.

nom

WIDEBAND OPERATION

The ADA4817-1/ADA4817-2 provides excellent performance as a

high speed buffer. Figure 38 shows the circuit used for wideband

characterization for high gains. The impedance at the summing

junction (RF || RG) forms a pole in the amplifier’s loop response

with the amplifier’s input capacitance of 1.5 pF. This pole can

cause peaking and ringing if its frequency is too low. Feedback

resistances of 100 Ω to 400 Ω are recommended, because they

minimize the peaking and they do not degrade the perfor-

mance of the output stage. Peaking in the frequency response

can also be compensated for with a small feedback capacitor

(CF) in parallel with the feedback resistor, or a series resistor

in the noninverting input as shown in Figure 42.

The distortion performance depends on a number of variables:

•

The closed-loop gain of the application

•

Whether it is inverting or noninverting

•

Amplifier loading

•

Signal frequency and amplitude

•

Board layout

The best performance is usually obtained in the G + 1

configuration with no feedback resistance, big output

load resistors, and small board parasitic capacitances.

DRIVING CAPACITIVE LOADS

In general, high speed amplifiers have a difficult time driving

capacitive loads. This is particularly true in low closed-loop

gains, where the phase margin is the lowest. The difficulty

arises because the load capacitance, CL, forms a pole with the

output resistance, RO, of the amplifier. The pole can be described

by the following equation:

2π

(12)

If this pole occurs too close to the unity-gain crossover point,

the phase margin degrades. This is due to the additional phase

loss associated with the pole.

Note that such capacitance introduces significant peaking in the

frequency response. Larger capacitance values can be driven but

must use a snubbing resistor (RSNUB) at the output of the amplifier,

as shown in Figure 42. Adding a small series resistor, RSNUB,

creates a zero that cancels the pole introduced by the load

capacitance. Typical values for RSNUB can range from 10 Ω to

50 Ω. The value is typically based on the circuit requirements.

Figure 42 also shows another way to reduce the effect of the

pole created by the capacitive load (CL) by placing a capacitor

(CF) in the feedback loop parallel to the feedback resistor

Typical capacitor values can range from 0.5 pF to 2 pF.

Figure 43 shows the effect of adding a feedback capacitor

to the frequency response.

VIN

VOUT

0.1µF

10µF

+VS

–VS

49.9Ω

0.1µF

10µF

RSNUB

Figure 42. RSNUB or CF Used to Reduce Peaking

THERMAL CONSIDERATIONS

With 10 V power supplies and 19 mA quiescent current, the

ADA4817-1/ADA4817-2 dissipate 190 mW with no load. This

implies that in the LFCSP, whose thermal resistance is 94°C/W

for the ADA4817-1and 64°C/W for the ADA4817-2, the junction

temperature is typically almost 25° higher than the ambient tem-

perature. The ADA4817-1/ADA4817-2 are designed to maintain

a constant bandwidth over temperature; therefore, an initial ramp

up of the current consumption during warm-up is expected. The

VOS temperature drift is below 12 μV/°C; therefore, it can change

up to 0.3 mV due to warm-up effects for an ADA4817-1/

ADA4817-2 in a LFCSP on 10 V. The input bias current

increases by a factor of 1.7 for every 10°C rise in temperature.

Heavy loads increase power dissipation and raise the chip

junction temperature as described in the Absolute Maximum

Ratings section. Care should be taken not to exceed the rated

power dissipation of the package.

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