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TS4871 数据表(PDF) 20 Page - STMicroelectronics |
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TS4871 数据表(HTML) 20 Page - STMicroelectronics |
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20 / 28 page ![]() TS4871 20/28 Fig. 83 : SO8 & MiniSO8 Demoboard Top Solder Layer Fig. 84 : SO8 & MiniSO8 Demoboard Bottom Solder Layer s BTL Configuration Principle The TS4871 is a monolithic power amplifier with a BTL output type. BTL (Bridge Tied Load) means that each end of the load is connected to two single ended output amplifiers. Thus, we have : Single ended output 1 = Vout1 = Vout (V) Single ended output 2 = Vout2 = -Vout (V) And Vout1 - Vout2 = 2Vout (V) The output power is: For the same power supply voltage, the output power in BTL configuration is four times higher than the output power in single ended configuration. s Gain In Typical Application Schematic (see page 1) In flat region (no effect of Cin), the output voltage of the first stage is: For the second stage : Vout2 = -Vout1 (V) The differential output voltage is: The differential gain named gain (Gv) for more convenient usage is: Remark : Vout2 is in phase with Vin and Vout1 is 180 phased with Vin. It means that the positive terminal of the loudspeaker should be connected to Vout2 and the negative to Vout1. s Low and high frequency response In low frequency region, the effect of Cin starts. Cin with Rin forms a high pass filter with a -3dB cut off frequency. In high frequency region, you can limit the bandwidth by adding a capacitor (Cfeed) in parallel on Rfeed. Its form a low pass filter with a -3dB cut off frequency. ) W ( R ) Vout 2 ( Pout L 2 RMS = Vout1 = Vin – R fe ed Ri n -------------------- (V) Vout2 Vo ut1 = 2Vin – Rfee d Rin -------------------- (V) Gv = Vout2 Vou t1 – Vi n --------------------------------------- = 2 Rfee d Ri n -------------------- F CL = 1 2 π Rin Cin -------------------------------- Hz () FCH = 1 2 π Rfeed Cfeed ----------------------------------------------- Hz () |
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