TS4872 datasheet(22/29 Pages) STMICROELECTRONICS

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TS4872

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Then, the average current delivered by the supply

voltage is:

Then, the power dissipated by the amplifier is

Pdiss = Psupply - Pout (W)

and the maximum value is obtained when:

and its value is:

Remark : This maximum value is only depending

on power supply voltage and load values.

The efficiency is the ratio between the output

power and the power supply

The maximum theoretical value is reached when

Vpeak = Vcc, so

s Decoupling of the circuit

Two capacitors are needed to bypass properly the

TS4872. A power supply bypass capacitor Cs and

a bias voltage bypass capacitor Cb.

Cs has especially an influence on the THD+N in

high frequency (above 7kHz) and indirectly on the

power supply disturbances.

With 100µF, you can expect similar THD+N

performances like shown in the datasheet.

If Cs is lower than 100µF, in high frequency

increases, THD+N and disturbances on the power

supply rail are less filtered.

To the contrary, if Cs is higher than 100µF, those

disturbances on the power supply rail are more

filtered.

Cb has an influence on THD+N in lower frequency,

but its function is critical on the final result of PSRR

with input grounded in lower frequency.

If Cb is lower than 1µF, THD+N increase in lower

frequency (see THD+N vs frequency curves) and

the PSRR worsens up

If Cb is higher than 1µF, the benefit on THD+N in

lower frequency is small but the benefit on PSRR

is substantial (see PSRR vs. Cb curve : fig.12)

Note that Cin has a non-negligible effect on PSRR

in lower frequency. Lower is its value, higher is the

PSRR (see fig. 13).

s Pop and Click performance

Pop and Click performance is intimately linked with

the size of the input capacitor Cin and the bias

voltage bypass capacitor Cb.

Size of Cin is due to the lower cut off frequency

and PSRR value request and size of Cb is due to

THD+N and PSRR request always in lower

frequency.

Moreover, Cb determines the speed at which the

amplifier turns ON. The slower the speed is , the

softer turns ON noise.

The charge time of Cb is directly proportional to

the internal generator resistance 50k

Ω.

Then, the charging time constant for Cb is

τb = 50kΩxCb (s)

As Cb is directly connected to the non-inverting

input (pin 3 & 7) and if we want to minimize, in

amplitude and duration, the output spike on Vout1

(pin 8), Cin must be charged faster than Cb. The

charge time constant of Cin is

τin = (Rin+Rfeed)xCin (s)

Thus we have the relation

τin << τb (s)

The respect of this relation permits to minimize the

pop and click noise.

Remark : Minimize Cin and Cb has a benefit on

pop and click phenomena but also on cost and

size of the application.

ICC

AVG

= 2

VPEAK

πRL

-------------------- (A)

Pdi ss =

22 Vcc

π RL

---------------------- POUT

POUT (W)

–

∂Pdiss

∂POUT

---------------------- = 0

)

(

Vcc

max

Pdiss

η =

POUT

Psup pl y

------------------------ =

πVPEAK

4VCC

-----------------------

----- = 78.5%

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