ADATE209

Rev. 0 | Page 14 of 16

APPLICATIONS INFORMATION

DATA INPUTS

The ADATE209 contains three high speed differential inputs

for each channel. Two of the inputs, combined in an on-chip

exclusive-OR gate, control the VHx/VLx transitions. The

exclusive-OR gate can be used as a data mux or for data inversion.

The third input is used to control the transitions to the VTx level.

Table 5. Logic Truth Table

DAx

DBx

TERMx

DROUTx

Low

Low

Low

High

Low

Low

Low

High

Low

High

High

Low

X1

X1

High

The high speed inputs are designed to be compatible with most

types of differential inputs. Each side of the differential inputs is

terminated through 50 Ω to a common point. For connection to

PECL inputs, connect the DAxT/DBxT/TERMxT input

ADATE209) or to an appropriate resistor to ground. For connec-

tion to LVDS, do not connect DAxT/DBxT/TERMxT. For

connection to CML signals, either leave DAxT/DBxT/TERMxT

open or connect DAxT/DBxT/TERMxT to the appropriate

DAxT, DBxT,

TERMxT

50Ω

50Ω

DAx, DBx,

TERMx

DAxB, DBxB,

TERMxB

Figure 31. Input Termination Schematic Diagram

THERMAL DIODE STRING

Figure 32 shows a simplified schematic of the thermal diode

string. To use the diode string, connect VCCTHERM to 7.0 V

and measure the voltage at THERM. The nominal gain of the

thermal diode string is −4.7 mV/°C.

40Ω

VCCTHERM

THERM

GND

ADATE209

Figure 32. Thermal Diode String Schematic

CABLE LOSS COMPENSATION/PEAKING

CIRCUITRY

The ADATE209 has two different CLC/peaking modes: nominal

and boost. In nominal mode, a small amount of high frequency

energy is injected in the driver output signal to compensate for

high frequency losses in the test interface. In boost mode, a

much larger percentage of high frequency energy is injected in

the driver output signal. The two modes are controlled through

the CLCxEN signal.

Table 6.

CLCxEN

CLC/Peaking Mode

Logic low

Nominal

Logic high

Boost

For applications using very short path lengths, very high fidelity

cables and connectors, and/or lower data rates, nominal mode

should be used. For applications using lower fidelity cables and

connectors (and often lower cost) and/or at higher data rates,

use boost mode.

DEFAULT TEST CONDITIONS

Table 7 lists the default test conditions.

Table 7.

Name

Default Test Condition

DB1/DB1B

Logic high

DB2/DB2B

Logic high

DA1T/DA2T/DB1T/DB2T

1.3 V

VHx

2.0 V

VLx

0.0 V

VTx

1.0 V