ADP5588ACPZ-R7 datasheet(8/28 Pages) AD

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ADP5588

Rev. A | Page 8 of 28

To prevent glitches or narrow press times registering as valid

key presses, the key scanner requires the key to be pressed for

two scan cycles. The key scanner has a sampling period of 25 ms,

so the key must be pressed and held for at least 25 ms to register

as pressed. If the key is continuously pressed, the key scanner

continues to sample every 25 ms. If a key that was pressed is

released for 25 ms or greater, the state machine sets the appro-

priate keys in the key event status register with the key pressed

bits cleared in the order detected. Because the release of a key is

not necessarily in sync with the key scan sampling period, it may

take between 25 ms and 50 ms for a key to register as released.

After the key is registered as released, the key scanner goes back

to idle mode. Figure 5 shows the row and column pins

connected to a typical 10 × 8, 80-switch keypad matrix.

R7 R6 R5 R4 R3 R2 R1 R0

C0 C1 C2 C3 C4 C5 C6 C7

10 × 8 KEYPAD MATRIX

VCC

Figure 5. Keypad Decode Configuration

Key Event Tracking

The 10-key event registers are set to act as a FIFO, meaning that

reading any of the 10-key event registers yields the key events in

the order they were pressed and released.

Tracking of key events is done with the help of the key event

counter (the KEC field in Register 0x03) and the FIFO/key

event registers (Register 0x04 through Register 0x0D). The KEC

count increases as keys are pressed and released; up to 10 events

can be logged in the counter. The FIFO/key event registers, on

the other hand, display the key events and their status (pressed

or released) as they are read out of the FIFO. The FIFO registers

are made of eight bits, with the MSB dedicated as the status bit

(1 indicates a press and 0 indicates a release); the remaining

seven bits are used to display binary representation of the keys

that are pressed or released.

The first read of any of the FIFO registers displays the first

event that happened and its status. Subsequent reads of the

same register replace the register data with the next event that

happens. If tracking of all the events is important, it is best to

used a single register per event. After all the events in the FIFO

are read, reading of any of the event registers yields a zero value.

Table 11 and Table 12 show the event sequences as they are

logged in and read from the FIFO. The 10 FIFO registers are

labeled A through J, and keys are labeled A0 through J7.

Table 11. Example of Event Sequence

Key Pressed/Released

Status

Key Event Counter

Pressed

Released

Pressed

Released

Pressed

Released

Pressed

Released

Table 12. Interpretation of FIFO Event Reading

Key Event

Counter

Key Event

Read

Key Event Reg-

ister Content

(Binary)1

Key Event

Interpretation

1 0000000

Key A0 pressed

1 0000001

Key B1 pressed

0 0000000

Key A0 released

1 0000010

Key C2 pressed

0 0000001

Key B1 released

1 0000011

Key D3 pressed

0 0000010

Key C2 released

1 0001000

Key E4 pressed

0 0000100

Key E4 released

0 0000011

Key D3 released

1 The first number indicates a key press or key release in Bit 7 of the key event

Key Event Overflow

The ADP5588 is equipped with an overflow feature to handle

key events beyond the FIFO capacity. When all events are filled, any

additional events set the OVR_FLOW_INT bit in Register 0x02;

if the OVR_FLOW_IEN bit in Register 0x01 is set, the host

processor is also interrupted when overflow occurs. When the

FIFO is not full, new events are added as the last events.

The OVR_FLOW_M bit in Register 0x01 sets the mode of

operation during overflows. Clearing the OVR_FLOW_M bit

causes new incoming events to be discarded, and setting this bit

rolls over and overwrites old data with new data starting at the

first event.

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