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TS652 数据表(PDF) 6 Page - STMicroelectronics |
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TS652 数据表(HTML) 6 Page - STMicroelectronics |
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6 / 9 page ![]() TS652 6/9 GAIN CONTROL The gain and the power down mode is programmed with a 4 bit digital word : The gain is the same for both channels. The digital inputs are CMOS compatible. The supply voltage of the logic decoder used to transcode the digital word can be either 3.3V or 5V or VCC. Digital Control Total Gain (dB) First Stage Gain (dB) Second Stage Gain (dB) Maximum Input Level Bandwidth Small Signal Eq. Input Noise (nV/ √Hz) $0000 -9 0 -9 2.8Vrms 110mHZ 29 $0001 -6 0 -6 2.8Vrms 100MHz 26 $0010 -3 0 -3 2.8Vrms 85MHz 23 $0011 0 0 0 2.8Vrms 69MHz 22 $0100 3 3 0 2Vrms 63MHz 16 $0101 6 6 0 1.4Vrms 58MHz 12 $0110 9 9 0 1Vrms 56MHz 9 $0111 12 12 0 0.7Vrms 55MHz 7 $1000 15 15 0 0.5Vrms 54MHz 6 $1001 18 18 0 0.35Vrms 52MHz 4.8 $1010 21 21 3 0.25Vrms 42MHz 4.7 $1011 24 24 6 175mVrms 30MHz 4.7 $1100 27 27 9 125mVrms 24MHz 4.6 $1101 30 30 12 88mVrms 18MHz 4.6 $1110 30 30 12 88mVrms 18MHz 4.6 $1111 30 30 12 88mVrms 18MHz 4.6 |
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