Low-Power, Quad, 12-Bit

Voltage-Output DACs with Serial Interface

10

______________________________________________________________________________________

CS

SCLK

DIN

DOUT

(MODE 1)

MSB FROM

PREVIOUS WRITE

MSB FROM

PREVIOUS WRITE

COMMAND

EXECUTED

9

8

16

1

A0

A1

D0

C1

C0

D11 D10

D9

D6

D5

D4

D3

D2

D1

D8

D7

DOUT

(MODE 0)

A0

A1

D0

A1

C1

C0

D11 D10

D9

D6

D5

D4

D3

D2

D1

D8

D7

A0

A1

D0

A1

C1

C0

D11 D10

D9

D6

D5

D4

D3

D2

D1

D8

D7

DATA PACKET (N)

DATA PACKET (N-1)

DATA PACKET (N)

DATA PACKET (N-1)

DATA PACKET (N)

Figure 5. Serial-Interface Timing Diagram

SCLK

DIN

DOUT

CS

Figure 6. Detailed Serial-Interface Timing Diagram

Power

-Down Lockout (PDL)

Drive power-down lockout,

PDL, low to disable software

shutdown. When in shutdown, transitioning

PDL from

high to low wakes up the device with the output set to

the state prior to shutdown. Use

PDL to asynchronously

wake up the device.

Daisy Chaining Devices

The MAX5500/MAX5501 can be daisy chained by con-

necting DOUT of one device to DIN of another device

(Figure 7).

Each DOUT output of the MAX5500/MAX5501 includes

an internal active pullup. The sink/source capability of

DOUT determines the time required to discharge/charge

specifications in the

Electrical Characteristics.

Figure 8 shows an alternate method of connecting sev-

eral MAX5500/MAX5501 devices. In this configuration,

the data bus is common to all devices. Data is not shift-

ed through a daisy chain. More I/O lines are required in

this configuration because a dedicated chip-select

input (

CS) is required for each IC.