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SPC5702BECLU 数据表(PDF) 83 Page - Freescale Semiconductor, Inc |
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SPC5702BECLU 数据表(HTML) 83 Page - Freescale Semiconductor, Inc |
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83 / 98 page  Electrical Characteristics MPC560xS Microcontroller Data Sheet Data Sheet, Rev. 1 Preliminary—Subject to Change Without Notice Freescale Semiconductor 83 3.16.7 Deserial Serial Peripheral Interface (DSPI) 1 FlexCAN timing specified at f SYS = 64 MHz, VDD12 = 1.14 V to 1.32 V, VDDE_x = 3.0 V to 5.5 V, TA = -40 to 105 °C, and CL = 50 pF with SRC = 0b00. 2 Parameter values guaranteed by design. Table 42. DSPI Timing1 1 DSPI timing specified at VDDE_x = 3.0 V to 5.5V, T A = -40 to 105 °C, and CL = 50 pF with SRC = 0b11. Num Symbol Characteristic Min Max Unit 1tSCK CC2 2 Parameter values guaranteed by design. SCK Cycle TIme3,4 3 The minimum SCK Cycle Time restricts the baud rate selection for given system clock rate. 4 The actual minimum SCK Cycle Time is limited by pad performance. 60 — ns 2tCSC CC2 PCS to SCK Delay5 5 The maximum value is programmable in DSPI_CTARx[PSSCK] and DSPI_CTARx[CSSCK], program PSSCK=2 & CSSCK = 2 -— ns 3tASC CC2 After SCK Delay6 6 The maximum value is programmable in DSPI_CTARx[PASC] and DSPI_CTARx[ASC] 20 — ns 4tSDC CC2 SCK Duty Cycle tSCK/2 –2ns tSCK/2 + 2ns ns 5tA CC2 Slave Access Time (PCSx active to SOUT driven) — 25 ns 6tDIS CC2 Slave SOUT Disable Time (PCSx inactive to SOUT High-Z or invalid) — 25 ns 7tSUI CC2 Data Setup Time for Inputs Master (MTFE = 0) Slave Master (MTFE = 1, CPHA = 0)7 Master (MTFE = 1, CPHA = 1) 7 This delay value is corresponding to SMPL_PT=00b which is bit field 9 and 8 of DSPI_MCR register. 35 5 5 35 — — — — ns ns ns ns 8tHI CC2 Data Hold Time for Inputs Master (MTFE = 0) Slave Master (MTFE = 1, CPHA = 0)7 Master (MTFE = 1, CPHA = 1) –4 10 26 –4 — — — — ns ns ns ns 9tSUO CC2 Data Valid (after SCK edge) Master (MTFE = 0) Slave Master (MTFE = 1, CPHA=0) Master (MTFE = 1, CPHA=1) — — — — 15 35 30 15 ns ns ns ns 10 tHO CC2 Data Hold Time for Outputs Master (MTFE = 0) Slave Master (MTFE = 1, CPHA = 0) Master (MTFE = 1, CPHA = 1) –15 5.5 0 –15 — — — — ns ns ns ns |
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