TSM108

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obtain the best compromise between electrical

noise, and size of the filtering self.

An external capacitor is to be connected between

ground and the Osc pin of TSM108 to set the

switching frequency.

The maximum duty cycle of the PWM function is

limited to 95% in order to ensure safe driving of

the MOSFET.

5. Gate Drive

The Gate Drive stage is directly commanded from

the PWM output signal. The Gate Drive stage is a

Push Pull Mosfet stage which bears different On

resistances in order to ensure a slower turn ON

than turn OFF of the P-Channel MOSFET. The

values of the output Gate Drive currents are given

by Isink (switch ON) and Isource (switch OFF).

The Gate Drive stage bears an integrated voltage

clamp which will prevent the P-Channel MOSFET

gate to be driven with voltages higher than 15V

(acting like a zener diode between Vcc and GD

(Gate Drive) pin.

6. Under Voltage Lock-Out, Over Voltage

Lock-Out

The UVLO and OVLO security functions aim at the

global application security.

When the Power supply decreases, there is the

inherent risk to drive the P-Channel MOSFET with

insufficient Gate voltage, and therefore to lead the

MOSFET

to

linear

operation,

and

to

its

destruction.

The UVLO is an input power supply voltage

detection which imposes a complete switch OFF

of the P-Channel MOSFET as soon as the Power

Supply decreases below UV. To avoid unwanted

oscillation of the MOSFET, a fixed hysteresis

margin is integrated (UVhyst).

UVLO is internally programmed to ensure 8V min

and 9V max, but the middle point of the integrated

resistor bridge is accessible and the value of the

UVLO is therefore adjustable by adding an

external resistor to modify the bridge ratio. The

resistor typical values of the bridge are given

(Ruvh, Ruvl).

When the Power supply increases, there is the

inherent risk to dissipate too much conduction

energy through the P-Channel MOSFET, and

therefore to lead to its destruction.

The OVLO is an input power supply voltage

detection which imposes a complete switch OFF

of the P-Channel MOSFET as soon as the Power

Supply increases above OV. To avoid unwanted

oscillation of the MOSFET, a fixed hysteresis

margin is integrated (OV

OVLO is internally programmed to ensure 32V

min. and 33V max., but the middle point of the

integrated resistor bridge is accessible and the

value of the OVLO is therefore adjustable by

adding an external resistor to modify the bridge

ratio.

The resistor typical values of the bridge are given

(R

Examples:

Let’s suppose that the internally set value of the

UVLO and / or OVLO level should be modified in a

specific

application,

or

under

specific

requirements.

6.1. UVLO decrease:

If the UVLO level needs to be lowered (UV1), an

additional resistor (Ruvh1) must be connected

between UV and Vcc following the equation:

(i)

where Ruvh//Ruvh1 means that Ruvh1 is in

parallel to Ruvh

Solving i. we obtain:

Ruvh - Ruvl (UV1 - Vref))

As an example, if UV1 needs to be set to 6V,

Ruvh1 = 256k

Ω

6.2. UVLO increase:

If the UVLO level needs to be increased (UV2), an

additional resistor (Ruvl2) must be connected

between UV and Gnd following the equation.

(ii)

where Ruvl//Ruvl2 means that Ruvl2 is in parallel

to Ruvl

Solving ii. we obtain:

Vref x (Ruvh + Ruvl))

As an example, if UV2 needs to be set to 12V,

Ruvl2 = 132k

Ω

6.3. OVLO decrease:

If the OVLO level needs to be lowered (OV1), an

additional resistor (Rovh1) must be connected

between OV and Vcc following the equation:

(iii)

where Rovh//Rovh1 means that Rovh1 is in

parallel to Rovh

Solving iii. we obtain:

Rovh - Rovl (OV1 - Vref))

As an example, if OV1 needs to be set to 25V,

Rovh1 = 867k

Ω