AT85C5122D-RDRUM datasheet(47/208 Pages) ATMEL

47 / 208 page

AT83R5122, AT8xC5122/23

4202F–SCR–07/2008

If the CK_CPU <= 4/3 * CK_ISO, the SCIB doesn’t work.

If the CK_CPU >= 6* CK_ISO, the programmer must take care of three cases:

•

Read (or write) operation on a SCIB register followed immediatly with an other Read

(or write) operation on the same register.

•

Read (or write) operation on a SCIB register followed immediatly with an other Read

(or write) operation on a linked register. The list of linked registers is in the table

below.

•

Write operation on a register of the list below followed immediatly with a read

operation on a SCIB register.

To avoid any trouble, a delay must be added between the two accesses on the SCIB

second. A solution is to add NOP (no operation) instructions. The number of NOP to add

depends of the rate between CK_CPU and CK_ISO (see table below).

Alternate Card Clock

The alternate Card uses the peripheral clock divided by the PR3 prescaler. (1; 1/2; 1/4;

1/8 division ratio). See Section "Alternate Card", page 76 for the definition of the alter-

nate clock.

DC/DC Converter Clock

The DC/DC block needs a clock with a 50% duty cycle. The frequency must also be

included in the range 3.68 MHz and 6 MHz. The PR4 prescaler is used to configure the

DC/DC frequency.

Linked registers

Write in SCICR and after read of SCETU0-1

Write in SCIBUF and after read of SCISR

Wait after Write operation on this registers

SCICR, SCIER, SCETU0-1,SCGT0-1,

SCWT0-3,SCCON

Min CLK_CPU

Max CLK_CPU

Number of

CPU cycles to add

CLK_CPU >= 6 * CLK_ISO

CLK_CPU <= 12 * CLK_ISO

6 ( example1 NOP)

CLK_CPU >= 12* CLK_ISO

CLK_CPU <= 16 * CLK_ISO

12 ( example 2 NOP)

XTAL1 (MHz)

DCCKPS3:0 value

Prescaler Factor

DC/DC converter CLK (MHz)

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