WS27C010L-12DMB datasheet(3/5 Pages) STMICROELECTRONICS

3 / 5 page

SYMBOL

PARAMETER

CONDITIONS

TYP(6)

MAX

UNITS

CIN

Input Capacitance

VIN = 0V

COUT

Output Capacitance

VOUT = 0V

CVPP

VPP Capacitance

VPP = 0 V

4-27

WS27C010L

AC READ TIMING DIAGRAM

tACC

tOH

ADDRESS VALID

VALID OUTPUT

ADDRESSES

VIH

VIL

tOE

tDF

tCE

VIH

VIL

VIH

VIL

HIGH Z

(5)

(4)

OUTPUT

CAPACITANCE(5) T

A = 25 °C, f = 1 MHz

100 pF

(INCLUDING SCOPE

AND JIG

CAPACITANCE)

820

Ω

2.01 V

D.U.T.

A.C. TESTING INPUT/OUTPUT WAVEFORM

TEST LOAD (High Impedance Test Systems)

2.4

0.4

2.0

0.8

2.0

0.8

TEST

POINTS

NOTE: 7. Provide adequate decoupling capacitance as close as possible to this device to achieve the published A.C. and D.C. parameters.

A 0.1 microfarad capacitor in parallel with a 0.01 microfarad capacitor connected between VCC and ground is recommended.

Inadequate decoupling may result in access time degradation or other transient performance failures.

NOTES: 5. This parameter is only sampled and is not 100% tested.

6. Typical values are for TA = 25°C and nominal supply voltages.

A.C. testing inputs are driven at 2.4 V for a logic "1" and 0.4 V

for a logic "0." Timing measurements are made at 2.0 V for a

logic "1" and 0.8 V for a logic "0".

NOTE:

4. OE may be delayed up to tCE – tOE after the falling edge of CE without impact on tCE.

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