7-23

LP0701

P-Channel Enhancement-Mode

Lateral MOSFET

BV

I

D(ON)

V

GS(th)

BV

DGS

(max)

(min)

(max)

TO-92

SO-8

Die

-16.5V

1.5

Ω

-1.25A

-1.0V

LP0701N3

LP0701LG

LP0701ND

Ordering Information

Order Number / Package

Advanced MOS Technology

These enhancement-mode (normally-off) transistors utilize a lat-

eral MOS structure and Supertex’s well-proven silicon-gate

manufacturing process. This combination produces devices with

the power handling capabilities of bipolar transistors and with the

high input impedance and negative temperature coefficient inher-

ent in MOS devices. Characteristic of all MOS structures, these

devices are free from thermal runaway and thermally-induced

secondary breakdown. The low threshold voltage and low on-

resistance characteristics are ideally suited for hand held battery

operated applications.

Applications

Logic level interfaces

Solid state relays

Battery operated systems

Photo voltaic drives

Analog switches

General purpose line drivers

Absolute Maximum Ratings

Drain-to-Source Voltage

BV

DSS

Drain-to-Gate Voltage

BV

DGS

Gate-to-Source Voltage

± 10V

Operating and Storage Temperature

-55

°C to +150°C

Soldering Temperature*

300

°C

Features

Ultra low threshold

High input impedance

Low input capacitance

Fast switching speeds

Low on resistance

Freedom from secondary breakdown

Low input and output leakage

Complementary N- and P-channel devices

Package Options

(Note 1)

Note: See Package Outline section for dimensions.

Low Threshold

S G D

TO-92

1

2

3

4

8

7

6

5

SO-8

top view

NC

D

NC

D

SD

GD