CoreAI

v2.0

9

CFG_AT9, CFG_AT8, CFG_AT7,

CFG_AT6, CFG_AT5, CFG_AT4,

CFG_AT3, CFG_AT2, CFG_AT1,

CFG_AT0

0 to 1,023

Configure ATx Inputs: Set each of these 10-bit integers to configure the AT9

through AT0 inputs that are connected to the AB macro. The lower 8 bits of

each of these 10-bit integers are reserved for generating firmware settings for

the target processor used with CoreAI and are ignored by the CoreAI

hardware. The upper 2 bits are used to create the settings for each ATx input,

shown in Table 7 on page 10.

For example, if CFG_AT2 is set to the binary value 0000000000 (decimal 0),

the AT2 input will be used as an analog temperature monitor input. If

CFG_AT2 is set to the binary value 0100000000 (decimal 256), the AT2 input

will be used as a digital input, and the buffered DATOUT2 output would be

connected to the user’s own logic. If CFG_AT2 is set to the binary value

1000000000 (decimal 512), the AT2 input will be used as an analog voltage

monitor input. If CFG_AT2 is set to the binary value 1100000000 (decimal

768), the AT2 input will be disabled; in this case, the CoreAI AT2 input will not

be used and the AT2 input of the AB macro will be hardwired to logic 0 within

CoreAI.

CFG_GD9, CFG_GD8, CFG_GD7,

CFG_GD6, CFG_GD5, CFG_GD4,

CFG_GD3, CFG_GD2, CFG_GD1,

CFG_GD0

0 to 1,023

Configure Gate Drivers: Set each of these 10-bit integers to configure the

GDON9 through GDON0 inputs and the AG9 through AG0 outputs that are

connected to the AB macro. The lower 8 bits of each of these 10-bit integers

are reserved for generating firmware settings for the target processor used

with CoreAI and are ignored by the CoreAI hardware. The upper 2 bits are

used to create the settings shown in Table 8 on page 10.

For example, if CFG_GD1 is set to the binary value 0000000000 (decimal 0),

the AG1 gate-driver output will be controlled by a software-controlled register

within CoreAI (ADC Control Register 5). If CFG_GD1 is set to the binary value

0100000000 (decimal 256), the DDGDON1 input (connected to the user’s

own logic) will be used to directly control the AG1 gate-driver output. If

CFG_GD1 is set to the binary value 1100000000 (decimal 768), the AG1

output will be disabled; in this case, the CoreAI AG1 output will not be used

and the GDON1 input of the AB macro will be hardwired to logic 0 within

CoreAI.

Table 5 • Settings for AVx Inputs

CFG_AVx Bit-Position Values ('X' indicates "don’t care")

AVx Input Usage

9

876

5

432

1

0

0

0

X

X

X

X

X

X

X

X

Voltage Monitor (default)

0

1

XX

X

XXX

X

X

Digital Input

1

0

XX

X

XXX

X

X

Reserved (unused)

1

1

XX

X

XXX

X

X

Disabled

Table 6 • Settings for ACx Inputs

CFG_ACx Bit-Position Values ('X' indicates "don’t care")

ACx Input Usage

9

8

7

6

5

4

321

0

0

0

X

X

X

X

X

X

X

X

Current Monitor (default)

0

1

X

X

X

X

X

X

X

X

Digital Input

1

0

X

X

X

X

X

X

X

X

Voltage Monitor

1

1

X

X

X

X

XXX

X

Disabled

Table 4 • CoreAI Parameters/Generics Descriptions (Continued)

Name

Valid Range

Description

Note: *Invalid values are 3, 7, 11, and 15 (refer to the