LT6556

7

6556f

PI FU CTIO S

IN1A (Pin 1): Channel 1 Input A. This pin has a nominal

impedance of 500kΩ and does not have any internal

termination resistor.

DGND (Pin 2): Digital Ground Reference for Enable Pin.

This pin is normally connected to ground.

IN2A (Pin 3): Channel 2 Input A. This pin has a nominal

impedance of 500kΩ and does not have any internal

termination resistor.

VREF (Pin 4): Voltage Reference for Input Clamping. This

is the tap to an internal voltage divider that defines mid-

supply. It is normally connected to ground in dual supply,

DC coupled applications.

IN3A (Pin 5): Channel 3 Input A. This pin has a nominal

impedance of 500kΩ and does not have any internal

termination resistor.

AGND (Pin 6): Analog Ground for Isolation between IN3A

and IN1B. AGND pins have ESD protection and should not be

connected to potentials outside the power supply range.

IN1B (Pin 7): Channel 1 Input B. This pin has a nominal

impedance of 500kΩ and does not have any internal

termination resistor.

AGND (Pin 8): Analog Ground for Isolation between IN1B

and IN2B. AGND pins have ESD protection and should not be

connected to potentials outside the power supply range.

IN2B (Pin 9): Channel 2 Input B. This pin has a nominal

impedance of 500kΩ and does not have any internal

termination resistor.

AGND (Pin 10): Analog Ground for Isolation between

IN2B and IN3B. AGND pins have ESD protection and

should not be connected to potentials outside the power

supply range.

IN3B (Pin 11): Channel 3 Input B. This pin has a nominal

impedance of 500kΩ and does not have any internal

termination resistor.

ternally connected to each other and must all be connected

externally. Proper supply bypassing is necessary for best

performance. See the Applications Information section.

are not internally connected to each other and must all

be connected externally. Proper supply bypassing is

necessary for best performance. See the Applications

Information section.

V– (Pin 15): Negative Supply Voltage for Channel 3 Output

must all be connected externally. Proper supply bypassing

is necessary for best performance. See the Applications

Information section.

OUT3 (Pin 16): Channel 3 Output. It is the buffered output

of the selected Channel 3 input.

V+ (Pin 17): Positive Supply Voltage for Channels 2 and

each other and must all be connected externally. Proper

supply bypassing is necessary for best performance. See

the Applications Information section.

OUT2 (Pin 18): Channel 2 Output. It is the buffered output

of the selected Channel 2 input.

V– (Pin 19): Negative Supply Voltage for Channels 1 and

each other and must all be connected externally. Proper

supply bypassing is necessary for best performance. See

the Applications Information section.

OUT1 (Pin 20): Channel 1 Output. It is the buffered output

of the selected Channel 1 input.

V+ (Pin 21): Positive Supply Voltage for Channel 1 Output

must all be connected externally. Proper supply bypassing

is necessary for best performance. See the Applications

Information section.

SEL

⎯A/B (Pin 22): Select Pin. This high impedance pin

selects which set of inputs are sent to the output pins.

When the pin is pulled low, the A inputs are selected. When

the pin is pulled high, the B inputs are selected.

⎯E⎯N (Pin 23): Enable Control Pin. An internal pull-up resistor

of 46k defines the pin’s impedance and will turn the part

off if the pin is unconnected. When the pin is pulled low,

the amplifiers are enabled.

Exposed Pad (Pin 25, QFN Only): The Exposed Pad is

(GN24 Package)