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LT6556IGN 数据表(PDF) 3 Page - Linear Technology

部件名 LT6556IGN
功能描述  750MHz Gain of 1 Triple 2:1Video Multiplexer
PDF  16 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LT6556IGN 数据表(HTML) 3 Page - Linear Technology

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LT6556
3
6556f
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: This parameter is guaranteed to meet specified performance
through design and characterization. It is not production tested.
Note 3: As long as output current and junction temperature are kept
below the Absolute Maximum Ratings, no damage to the part will occur.
Depending on the supply voltage, a heat sink may be required.
Note 4: The LT6556C is guaranteed functional over the operating
temperature range of –40°C to 85°C.
Note 5: The LT6556C is guaranteed to meet specified performance from
0°C to 70°C. The LT6556C is designed, characterized and expected to
meet specified performance from –40°C and 85°C but is not tested or
QA sampled at these temperatures. The LT6556I is guaranteed to meet
specified performance from –40°C to 85°C.
Note 6: In order to follow the constraints for 4.5V operation for PSRR
and IPSRR testing at ± 2.25V, the DGND pin is set to V
, the ⎯E⎯N pin is set
The denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ±5V, RL = 1k, CL = 1.5pF, VEN = 0.4V, VAGND, VDGND, VVREF = 0V.
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
IPSRR
Input Current Power Supply Rejection
VS = ±2.25V to ±6V (Note 6)
1
±3
µA/V
AV ERR
Gain Error
VOUT = VREF = ±2V, Nominal Gain 1V/V
–2.8
–1.15
0
%
AV MATCH
Gain Matching
Any One Channel to Another
±0.05
%
VOUT
Output Voltage Swing
(Note 7)
±3.65
±3.85
V
IS
Supply Current, Per Amplifier
RL = ∞
9.5
13
14.5
mA
mA
Supply Current, Disabled, Per Amplifier
V⎯E⎯N = 4V, RL = ∞
V⎯E⎯N = Open, RL = ∞
47
42
330
330
µA
µA
I⎯E⎯N
Enable Pin Current
V⎯E⎯N = 0.4V
V⎯E⎯N = 4V
–200
–75
–95
–21
µA
µA
ISEL
Select Pin Current
VSEL = 0.4V
VSEL = 4V
–50
–50
–5
–1
µA
µA
ISC
Output Short-Circuit Current
RL = 0Ω, VIN = ±2V, VREF = ±1V
±50
±105
mA
SR
Slew Rate
±1V on ±2.2V Output Step (Note 8)
1200
2100
V/µs
–3dB BW
Small-Signal –3dB Bandwidth
VOUT = 200mVP-P
750
MHz
0.1dB BW
Gain Flatness ±0.1dB Bandwidth
VOUT = 200mVP-P
120
MHz
FPBW
Full Power Bandwidth 2V
VOUT = 2VP-P (Note 9)
190
335
MHz
Full Power Bandwidth 4V
VOUT = 4VP-P (Note 9)
175
MHz
All-Hostile Crosstalk
f = 10MHz, VIN = 2VP-P
f = 100MHz, VIN = 2VP-P
–72
–52
dB
dB
Selected Channel to Unselected
Channel Crosstalk
f = 10MHz, VIN = 2VP-P
f = 100MHz, VIN = 2VP-P
–85
–64
dB
dB
Channel Select Output Transient
INA = INB = 0V
200
mVP-P
Channel-to-Channel Select Time
INA = –1V, INB = 1V
from 50% SEL to VOUT = 0V
8ns
tS
Settling Time
0.1% of VFINAL, VSTEP = 2V
6.5
ns
tR, tF
Small-Signal Rise and Fall Time
10% to 90%, VOUT = 200mVP-P
500
ps
dG
Differential Gain
(Note 10)
0.056
%
dP
Differential Phase
(Note 10)
0.028
Deg
HD2
2nd Harmonic Distortion
f = 10MHz, VOUT = 2VP-P
–84
dBc
HD3
3rd Harmonic Distortion
f = 10MHz, VOUT = 2VP-P
–87
dBc
to V+ 0.4V, and the SEL pin is set to either V+ 0.4V or V+ 4V. At ±6V
and all other cases, DGND is set to ground and the
⎯E⎯N and SEL pins are
referenced from it.
Note 7: The VREF pin is set to 3V when testing positive swing and –3V
when testing negative swing to ensure that the internal input clamps do
not limit the output swing.
Note 8: Slew rate is 100% production tested using both inputs of
channel 2. Slew rates of channels 1 and 3 are guaranteed through
design and characterization.
Note 9: Full power bandwidth is calculated from the slew rate:
FPBW = SR/(π • VP-P)
Note 10: Differential gain and phase are measured using a Tektronix
TSG120YC/NTSC signal generator and a Tektronix 1780R video
measurement set. The resolution of this equipment is better than 0.05%
and 0.05°. Nine identical amplifier stages were cascaded giving an
effective resolution of better than 0.0056% and 0.0056°.



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