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LTC6943IGN 数据表(PDF) 5 Page - Linear Technology |
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LTC6943IGN 数据表(HTML) 5 Page - Linear Technology |
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5 / 16 page ![]() LTC6943 5 6943f Test Circuit 1. Leakage Current Test Common Mode Rejection Ratio (CMRR) The LTC6943, when used as a differential to single-ended converter rejects common mode signals and preserves differential voltages (Figure 1). Unlike other techniques, the LTC6943’s CMRR does not degrade with increasing common mode voltage frequency. During the sampling mode, the impedance of Pins 1, 2 (and 9, 10) should be balanced, otherwise, common mode signals will appear differentially. The value of the CMRR depends on the value of the sampling and holding capacitors (CS, CH) and on the sampling frequency. Since the common mode voltages are not sampled, the common mode signal frequency can well exceed the sampling frequency without experiencing aliasing phenomena. The CMRR of Figure 1 is measured by shorting Pins 6 and 11 and by observing, with a TEST CIRCUITS Test Circuit 2. RON Test Test Circuit 3. Oscillator Frequency, fOSC Test Circuit 4. CMRR Test 6943 • TC04 CMRR = 20 LOG () FOR OPTIMUM CMRR, THE COSC SHOULD BE LARGER THAN 0.0047µF, AND THE SAMPLING CAPACITOR ACROSS PINS 9 AND 10 SHOULD BE PLACED OVER A SHIELD TIED TO PIN 8 + V– ≤ VCM ≤ V + VCM VOUT VOUT 11 12 10 9 8 67 1µF 1µF CAPACITORS ARE NOT ELECTROLYTIC NOTE: APPLICATIO S I FOR ATIO Figure 1. Differential to Single-Ended Converter 6943 • TC01 (6, 11, 5, 16) (7, 12, 4, 13) (9, 10, 1, 2) NOTE: TO OPEN SWITCHES, S1 AND S3 PIN 14, SHOULD BE CONNECTED TO V–. TO OPEN S2, S4, THE COSC PIN 14 SHOULD BE CONNECTED TO V+ COSC + A 0V TO 10V 6943 • AI01 CS, CH ARE MYLAR OR POLYPROPYLENE + CH CS C– C+ VD 11 12 10 9 1/2 LTC6943 67 VD VCM + + + V+ 6943 • TC03 3 V– 14 (TEST PIN) IV 4 LTC6943 15 COSC 1 + 5 6943 • TC02 (6, 11, 5, 16) (7, 12, 4, 13) (9, 10, 1, 2) 100µA to 1mA CURRENT SOURCE + A VIN |
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