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LTC3545 数据表(PDF) 3 Page - Linear Technology |
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LTC3545 数据表(HTML) 3 Page - Linear Technology |
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3 / 20 page ![]() LTC3545/LTC3545-1 3 35451fb Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3545E/LTC3545E-1 are guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3545I/LTC3545I-1 are guaranteed to meet performance specifications over the full –40°C to 125°C operating junction temperature range. Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD)(68°C/W) This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VLOADREG Output Voltage Load Regulation (Notes 5, 6) 0.5 % IFBx Feedback Pin Leakage (Note 5) 80 nA IS Input DC Bias Current (All Regulators Enabled) Pulse Skip (Active Mode) Burst Mode Operation (All Regulators Sleeping) Shutdown (RUNX = 0V) ILOAD = 0A, 2.25MHz VFBx = 0.5V VFBx = 0.7V 680 58 0.1 750 70 2.0 μA μA μA fOSC Oscillator Frequency ● 1.8 2.25 2.7 MHz fSYNC Synchronization Frequency LTC3545 Only ● 13 MHz VRUN(HIGH) RUNx Input High Voltage ● 1V VRUN(LOW) RUNx Input Low Voltage ● 0.3 V IRUNx RUN Leakage Current ±0.1 ±1 μA ILSWx SWx Leakage VRUNx = 0V, VSWx = 0V or 5.5V, VIN = 5.5V ±0.1 ±1 μA ISYNC SYNC Leakage VRUN = 0V, VSYNC = 0V or 5.5V, VIN = 5.5V ±0.1 ±1 μA TPGOODx Power Good Threshold–Deviation From VFB Steady State (0.6V) VFBx Ramping Up VFBx Ramping Down –7.5 –10 % % RPGOODx Power Good Pull-Down On-Resistance IPGD = 50mA ● 14 50 Ω MODE/SYNC Thresholds 0.93 V Individual Regulator Characteristics (One Regulator Enabled) tSS Soft-Start Period VFBx = 10% to 90% Fullscale 850 1100 μs IPK Peak Switch Current Limit 1 1.3 1.6 A IQ Input DC Bias Current Pulse Skip (Active Mode) Burst Mode Operation (Sleeping) ILOAD = 0A, 2.25MHz VFBx = 0.5V VFBx = 0.7V 310 31 μA μA RPFET RDS(ON) of P-Channel FET (Note 7) ISWx = 100mA 0.35 Ω RNFET RDS(ON) of N-Channel FET (Note 7) ISWx = –100mA 0.35 Ω VUVLO Undervoltage Lockout (High VCC to Low) ● 1.8 2.25 V ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = PVIN = 3.6V unless otherwise noted. (Note 3) will exceed 125°C when overtemperature is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 4: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 5: The LTC3545/LTC3545-1 are tested in a proprietary test mode that connects VFB to the output of the error amplifier. Note 6: Load regulation is inferred by measuring the regulation loop gain. Note 7: The QFN switch-on resistance is guaranteed by correlation to water level measurements. Note 8: Guaranteed by long-term current density limitations. |
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