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LTC3524 数据表(PDF) 10 Page - Linear Technology |
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LTC3524 数据表(HTML) 10 Page - Linear Technology |
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10 / 16 page ![]() LTC3524 10 3524f OPERATION The doubler is internally connected to VOUT and generates a voltage of approximately 2X VOUT at V2x. The quadrupler has its input connected to V2x and output to VH. The regu- lated VH voltage is programmed at FBH and can be set to produce a voltage up to 4X VOUT. The maximum voltage VH can source depends on charge pump loading and the output impedance of the doubler and quadrupler stages (see Typical Performance Characteristics). The inverting charge pump has its input at VNIN and output at VN. Regulated VN voltage is set at FBN and can be programmed to a minimum negative voltage of VNIN minus diode drops. VNIN can be connected to VOUT, V2x, or VH depending on the negative voltage value required for the application. Efficiency is improved by using the lowest voltage possible on VNIN. As with the other charge pump outputs, the maximum negative voltage that VN can maintain will depend on loading. Two Schottky diodes are required to complete the negative charge pump as shown on the front page and applications circuits. LCD BIAS Sequencing Referring to the following text and Figure 2, the LTC3524 power-up and discharge sequence is explained. When input power is applied and ELCD is active, the boost converter initializes and charges its output towards the final pro- grammed value. When the boost converter output (VOUT) has reached approximately 90% of its final value, an internal signal is asserted which allows the charge pump doubler (V2x) to begin operation toward its final goal of 2X VOUT. Approximately 2ms later, the charge pump inverter (VN) begins operation toward its programmed value. When the VN has reached approximately 50% of its final value, a 2ms (nominal) timeout period begins. At the conclusion of the 2ms timeout period, the charge pump quadrupler (VH) is allowed to begin operation. During the initial power-up sequence, the charge pumps run at half speed. If VNIN is connected to VH, a diode-OR circuit is needed between V2x, VH, and VNIN (see the Typical Applications) to ensure proper sequencing. When ELCD is brought low, internal transistors discharge the outputs in an orderly fashion. As shown in Figure 2, VN and V2x are initially discharged, followed by VH, fol- lowed by VOUT. VOUT must be discharged before the part can enter low current shutdown mode (ELCD, ELED1, ELED2 must be low, as well). White LED Boost Driver The white LED driver portion of the LTC3524 consists of a nonsynchronous, fixed frequency, current mode boost converter that generates the voltage required for one or two LED strings. The converter has an internal feedback loop and slope compensation circuitry, reducing external components and simplifying the design. As with the LCD bias boost converter, the 1.5MHz operation allows tiny external components to be used. The boost converter Figure 2. LCD Power-Up and Power-Down Timing Diagram VOUT VOUT V2x VN VH V2x VH TIME ELCD ELCD VN 3524 F02 |
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