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FD7T 数据表(PDF) 8 Page - Pletronics, Inc.

部件名 FD7T
功能描述  Multi-Output CMOS Clock Oscillator
PDF  19 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  PLETRONICS [Pletronics, Inc.]
网页  http://www.pletronics.com
标志 PLETRONICS - Pletronics, Inc.

FD7T 数据表(HTML) 8 Page - Pletronics, Inc.

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FD7T Series Multi-Output
CMOS Clock Oscillator
May 2008
www.pletronics.com
425-776-1880
8
Electrical Specification over the specified temperature range
Item
Min
Max
Unit
Condition
Base Frequency
12
32
MHZ
Frequency Range OUT1
0.0117
230
MHZ
Base Frequency / (1 to 1023) -or- PLL1
Frequency Range OUT2 - 7
0.0945
230
MHZ
Frequency Accuracy
45"
-50
+50
ppm
For all supply voltages, load changes,
aging for 1 year, shock, vibration and
temperatures
44"
-25
+25
20"
-20
+20
Recommended Operating Conditions
Device Supply Voltage V
DD
1.7
1.9
V
Output Supply Voltage V
DDOUT
1.7
3.6
V
Output Supply Voltage “L” V
DDOUT
1.7
1.9
V
Low Level Input voltage
--
30
%
of V
DD
High Level Input voltage
70
--
%
of V
DD
Input Voltage Range, S0
If 1K ohm in series with S0 pad
0
-1
1.9
4.0
VV
TH is 0.5 * VDD
Input Voltage Range, S1, S2
0
3.6
V
V
TH is 0.5 * VDD
Input current for:
S0 with 1K ohm in series
S0, S1, S2
03
mA
V
IN = 4V; VDD = 1.8V
05
µA
V
IN = VDD; VDD = 1.9V
-4
0
µA
V
IN = 0.0VD; VDD = 1.9V
Output Current, V
DDOUT = 3.3V
-12
+12
mA
Output Current, V
DDOUT = 2.5V
-10
+10
mA
Output Current, V
DDOUT = 1.8V
-5
+5
mA
Output Current “L”, V
DDOUT = 1.8V
-8
+8
mA
Output Load, LVCMOS
--
10
pf
Higher loads can be used
LVCMOS Output Parameters for V
DDOUT = 3.3v
Output High, V
DDOUT = 3.3V
2.9
--
V
I
OH = -0.1 mA
2.4
--
V
I
OH = -8.0 mA
2.2
--
V
I
OH = -12.0 mA
Output Low, V
DDOUT = 3.3V
--
0.1
V
I
OH = +0.1 mA
--
0.5
V
I
OH = +8.0 mA
--
0.8
V
I
OH = +12.0 mA
Rise & Fall Time
--
0.6
nS
V
DDOUT = 3.3v, 20 - 80%, 10pF Load
Output Symmetry
45
55
%
at 50% point of V
DDOUT



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