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CT74FCT162500ATPVC 数据表(PDF) 1 Page - Texas Instruments

部件名 CT74FCT162500ATPVC
功能描述  18-Bit Registered Transceivers
PDF  6 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

CT74FCT162500ATPVC 数据表(HTML) 1 Page - Texas Instruments

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18-Bit Registered Transceivers
CY74FCT16500T
CY74FCT162500T
SCCS056 - August 1994 - Revised March 2000
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
Copyright
© 2000, Texas Instruments Incorporated
Features
• FCT-C speed at 4.6 ns
• Power-off disable outputs permits live insertion
• Edge-rate control circuitry for significantly improved
noise characteristics
• Typical output skew < 250 ps
• ESD > 2000V
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages
• Industrial temperature range of
−40˚C to +85˚C
•VCC = 5V ± 10%
CY74FCT16500T Features:
• 64 mA sink current, 32 mA source current
• Typical VOLP (ground bounce) <1.0V at VCC = 5V,
TA = 25˚C
CY74FCT162500T Features:
• Balanced 24 mA output drivers
• Reduced system switching noise
• Typical VOLP (ground bounce) <0.6V at VCC = 5V,
TA= 25˚C
Functional Description
These 18-bit universal bus transceivers can be operated in
transparent, latched, or clock modes by combining D-type
latches and D-type flip-flops. Data flow in each direction is
controlled by output-enable (OEAB and OEBA), latch enable
(LEAB and LEBA), and clock inputs (CLKAB and CLKBA)
inputs. For A-to-B data flow, the device operates in transparent
mode when LEAB is HIGH. When LEAB is LOW, the A data is
latched if CLKAB is held at a HIGH or LOW logic level. If LEAB
is LOW, the A bus data is stored in the latch/flip-flop on the
HIGH-to-LOW transition of CLKAB. OEAB performs the output
enable function on the B port. Data flow from B-to-A is similar
to that of A-to-B and is controlled by OEBA, LEBA, and
CLKBA. The output buffers are designed with power-off
disable feature that allows live insertion of boards.
The
CY74FCT16500T
is
ideally
suited
for
driving
high-capacitance loads and low-impedance backplanes.
The CY74FCT162500T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for
minimal undershoot and reduced ground bounce. The
CY74FCT162500T is ideal for driving transmission lines.
GND
Logic Block Diagram
Pin Configuration
1
2
3
4
5
6
7
8
9
10
11
12
33
32
31
30
29
36
35
OEAB
34
SSOP/TSSOP
Top View
13
14
15
16
17
18
19
20
21
22
23
24
45
44
43
42
41
37
38
39
40
48
47
46
LEAB
A1
A2
A3
B1
B2
B3
GND
GND
GND
VCC
A6
A7
A4
A5
B4
B5
B6
B7
VCC
GND
A10
A11
A8
A9
B8
B9
B11
B12
GND
A12
VCC
A16
GND
A14
VCC
A15
A17
FCT16500-1
TO 17 OTHER CHANNELS
LEAB
OEBA
LEBA
CLKAB
CLKBA
OEAB
C
D
C
D
C
D
C
D
A1
B1
25
26
27
28
49
52
51
50
A13
OEBA
LEBA
GND
A18
CLKAB
53
56
55
54
B10
GND
B14
B15
B13
B16
B17
GND
B18
CLKBA
FCT16500-2


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