PCA8550

NONVOLATILE 5-BIT REGISTER

SCPS050A – MARCH 1999 – REVISED APRIL 1999

3

POST OFFICE BOX 655303

the serial data (SDA) input/output while the serial clock (SCL) input is high. After the start condition, the device

address byte is sent, MSB first, including the data-direction bit (R/W). This device does not respond to the

general call address. After receiving the valid address byte, this device responds with an acknowledge, a low

on the SDA input/output during the high of the acknowledge-related clock pulse.

The data byte follows the address acknowledge. If the R/W bit is high, the data from this device are the values

read from the nonvolatile register. If the R/W bit is low, the data are from the master, to be written into the register.

A valid data byte is one in which the three high-order bits are low. The first valid data byte that is received is

written into the register, following the stop condition. If an invalid data byte is received, it is acknowledged, but

is not written into the register. The data byte is followed by an acknowledge sent from this device. If other data

bytes are sent from the master following the acknowledge, they are ignored by this device.

A stop condition, a low-to-high transition on the SDA input/output while the SCL input is high, is sent by the

master. If the WP input is low during the falling edge of the first valid data byte acknowledge on the SCL input

nonvolatile register. Data are written only if complete bytes are received and acknowledged. Writing to the

I2C INTERFACE DEFINITION TABLE

BYTE

BIT

BYTE

7 (MSB)

6

5

4

3

2

1

0 (LSB)

Address

H

L

L

H

H

H

L

R/W

Data

L

L

L

NON-

MUXED

OUT

MUX OUT

D

MUX OUT

C

MUX OUT

B

MUX OUT

A

–0.5 V to 6.5 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–0.5 V to 6.5 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–0.5 V to 6.5 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–0.5 V to 2.9 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . .

–50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–50 mA, +10 mA

. . . . . . . . . . . . . . . . . . . . . . . .

–50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±15 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±30 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance,

113

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DB package

131

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package

149

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65

°C to 85°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The value of VCC is provided in the recommended operating conditions table.

3. The package thermal impedance is calculated in accordance with JESD 51.