数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

CDK1308 数据表(PDF) 6 Page - Cadeka Microcircuits LLC.

部件名 CDK1308
功能描述  Ultra Low Power, 20/40/65/80MSPS, 10-bit Analog-to-Digital Converters (ADCs)
PDF  14 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  CADEKA [Cadeka Microcircuits LLC.]
网页  http://www.cadeka.com
标志 CADEKA - Cadeka Microcircuits LLC.

CDK1308 数据表(HTML) 6 Page - Cadeka Microcircuits LLC.

Back Button CDK1308 Datasheet HTML 2Page - Cadeka Microcircuits LLC. CDK1308 Datasheet HTML 3Page - Cadeka Microcircuits LLC. CDK1308 Datasheet HTML 4Page - Cadeka Microcircuits LLC. CDK1308 Datasheet HTML 5Page - Cadeka Microcircuits LLC. CDK1308 Datasheet HTML 6Page - Cadeka Microcircuits LLC. CDK1308 Datasheet HTML 7Page - Cadeka Microcircuits LLC. CDK1308 Datasheet HTML 8Page - Cadeka Microcircuits LLC. CDK1308 Datasheet HTML 9Page - Cadeka Microcircuits LLC. CDK1308 Datasheet HTML 10Page - Cadeka Microcircuits LLC. Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 14 page
background image
©2008 CADEKA Microcircuits LLC
www.cadeka.com
6
ADVANCE Data Sheet
Electrical Characteristics - CDK1308A
(AVDD = 1.8V, DVDD = 1.8V, DVDDCLK = 1.8V, OVDD = 2.5V, 20MSPS clock, 50% clock duty cycle,
-1dBFS 8MHz input signal, unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Performance
SNR
Signal to Noise Ratio
FIN = 2MHz
61.7
dBFS
FIN = 8MHz
61.6
dBFS
FIN ≃ FS/2
61.6
dBFS
FIN = 20MHz
61.6
dBFS
SINAD
Signal to Noise and Distortion Ratio
FIN = 2MHz
61.7
dBFS
FIN = 8MHz
61.6
dBFS
FIN ≃ FS/2
60.5
dBFS
FIN = 20MHz
61.6
dBFS
SFDR
Spurious Free Dynamic Range
FIN = 2MHz
84.1
dBc
FIN = 8MHz
85.5
dBc
FIN ≃ FS/2
70.3
dBc
FIN = 20MHz
87.5
dBc
HD2
Second order Harmonic Distortion
FIN = 2MHz
-88.8
dBc
FIN = 8MHz
-89.5
dBc
FIN ≃ FS/2
-95.9
dBc
FIN = 20MHz
-91.4
dBc
HD3
Third order Harmonic Distortion
FIN = 2MHz
-89.5
dBc
FIN = 8MHz
-90.5
dBc
FIN ≃ FS/2
-70.3
dBc
FIN = 20MHz
-89.7
dBc
ENOB
Effective number of Bits
FIN = 2MHz
10.0
bits
FIN = 8MHz
9.9
bits
FIN ≃ FS/2
9.8
bits
FIN = 20MHz
9.9
bits
Power Supply
AIDD
Analog Supply Current
5.6
mA
DIDD
Digital Supply Current
Digital core supply
1.0
mA
OIDD
Output Driver Supply
2.5V output driver supply, sine wave input,
FIN = 1MHz, CLK_EXT enabled
1.7
mA
2.5V output driver supply, sine wave input,
FIN = 1MHz, CLK_EXT disabled
1.2
mA
Analog Power Dissipation
10.1
mW
Digital Power Dissipation
OVDD = 2.5V, 5pF load on output bits,
FIN = 1MHz, CLK_EXT disabled
4.8
mW
Total Power Dissipation
OVDD = 2.5V, 5pF load on output bits,
FIN = 1MHz, CLK_EXT disabled
14.9
mW
Power Down Dissipation
9.9
μW
Sleep Mode
Power Dissipation, Sleep mode
7.7
mW
Clock Inputs
Max. Conversion Rate
20
MSPS
Min. Conversion Rate
15
MSPS



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com