SN74LVC16652

16-BIT BUS TRANSCEIVER AND REGISTER

WITH 3-STATE OUTPUTS

SCAS319B – NOVEMBER 1993 – REVISED JULY 1995

8

POST OFFICE BOX 655303

timing requirements over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted)

VCC = 3.3 V

± 0.3 V

VCC = 2.7 V

UNIT

MIN

MAX

MIN

MAX

fclock

Clock frequency

0

100

0

80

MHz

tw

Pulse duration, CLK high or low

4.5

4.5

ns

tsu

Setup time, A or B before CLKAB

↑ or CLKBA↑

Data high or low

5

5

ns

th

Hold time, A or B after CLKAB

↑ or CLKBA↑

Data high or low

0

0

ns

(unless otherwise noted) (see Figure 2)

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 3.3 V

± 0.3 V

VCC = 2.7 V

UNIT

(INPUT)

(OUTPUT)

MIN

MAX

MIN

MAX

fmax

100

80

MHz

A or B

B or A

1.5

7

8

tpd

CLKAB or CLKBA

AorB

1.5

8.5

9.5

ns

SAB or SBA

A or B

1.5

8.5

9.5

ten

OE or OE

A or B

1.5

8

9

ns

tdis

OE or OE

A or B

1.5

8.5

9.5

ns

PARAMETER

TEST CONDITIONS

TYP

UNIT

C d

Power dissipation capacitance per transceiver

Outputs enabled

CL =50 pF

f=10MHz

25

pF

Cpd

Power dissipation capacitance per transceiver

Outputs disabled

CL = 50 pF, f = 10 MHz

4

pF