SN74LVC16652

16-BIT BUS TRANSCEIVER AND REGISTER

WITH 3-STATE OUTPUTS

SCAS319B – NOVEMBER 1993 – REVISED JULY 1995

2

POST OFFICE BOX 655303

description (continued)

Data on the A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the

appropriate clock (CLKAB or CLKBA) inputs regardless of the levels on the select-control or output-enable

inputs. When SAB and SBA are in the real-time transfer mode, it is also possible to store data without using the

internal D-type flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output

reinforces its input. When all other data sources to the two sets of bus lines are at high impedance, each set

of bus lines remains at its last level configuration.

pullup resistor and OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor

is determined by the current-sinking/current-sourcing capability of the driver.

Active bus-hold circuitry holds unused or floating data inputs at a valid logic level.

The SN74LVC16652 is characterized for operation from – 40

°C to 85°C.