TDF8599BTH datasheet(7/54 Pages) NXP

7 / 54 page

TDF8599B_1

Product data sheet

Rev. 01 — 29 July 2009

7 of 54

NXP Semiconductors

TDF8599B

I2C-bus controlled dual channel class-D power ampliﬁer

[1]

X = do not care.

[1]

X = do not care.

8.3 Pulse-width modulation frequency

The output signal from the ampliﬁer is a PWM signal with a clock frequency of fosc. This

frequency is set by connecting a resistor (Rosc) between pins OSCSET and AGND. The

optimal clock frequency setting is between 300 kHz and 400 kHz. Connecting a resistor

with a value of 39 k

Ω, for example, sets the clock frequency to 320 kHz (see Figure 5).

The external capacitor (Cosc) has no inﬂuence on the oscillator frequency. It does

however, reduce jitter and sensitivity to disturbance. Using a 2nd order LC demodulation

ﬁlter in the application generates an analog audio signal across the loudspeaker.

8.3.1 Master and slave mode selection

In a master and slave conﬁguration, multiple TDF8599B devices are daisy-chained

together in one audio application with a single device providing the clock frequency signal

for all other devices. In this situation, it is recommended that the oscillators of all devices

are synchronized for optimum EMI behavior as follows:

All OSCIO pins are connected together and one TDF8599B in the application is

conﬁgured as the clock-master. All other TDF8599B devices are conﬁgured as

clock-slaves (see Figure 5).

• The clock-master pin OSCIO is conﬁgured as the oscillator output. When a resistor

(Rosc) is connected between pins OSCSET and AGND, the TDF8599B is in Master

mode.

• The clock-slave pins OSCIO are conﬁgured as the oscillator inputs. When pin

OSCSET is directly connected to pin AGND (see Table 6), the TDF8599B is in Slave

mode.

Table 4.

I2C-bus mode operation

Pin EN

Pin SEL_MUTE

Bit IB1[D0]

Bit IB2[D0]

Mode

HIGH (S2 closed)

HIGH

Operating mode

LOW

Mute mode

LOW

X[1]

Standby mode

LOW (S2 open)

X[1]

off (default)

Table 5.

Non-I2C-bus mode operation

Pin EN

Pin SEL_MUTE

Mode

HIGH (S2 closed)

HIGH (S1 open)

Operating mode

LOW (S1 closed)

Mute mode (default)

LOW (S2 open)

X[1]

off

Table 6.

Mode setting pin OSCIO

Mode

Settings

Pin OSCSET

Pin OSCIO

Master

Rosc > 26 kΩ

output

Slave

Rosc =0 Ω; shorted to pin AGND

input

TDF8599BTH 数据表(PDF) 7 Page - NXP Semiconductors

TDF8599BTH 数据表(HTML) 7 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54

数据表下载

链接网址

TDF8599BTH 数据表(PDF) 7 Page - NXP Semiconductors

TDF8599BTH 数据表(HTML) 7 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54

数据表 下载

链接网址

数据表下载