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STA2500D 数据表(PDF) 10 Page - STMicroelectronics

部件名 STA2500D
功能描述  Bluetooth??V2.1 EDR ("Lisbon") for automotive applications
PDF  57 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STA2500D 数据表(HTML) 10 Page - STMicroelectronics

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Quick reference data
STA2500D
10/57
Doc ID 16067 Rev 1
2.5
Current consumption
Tamb = 25°C, 13 MHz digital clock, 7 dBm output power for BR packets, 3 dBm output power
for EDR packets.
Vhyst
Schmitt trigger hysteresis (BT_VIO_B = 1.3 V)
0.2
0.3
0.4
V
CIN
Input capacitance
1
-
2.5
pF
TRISE
10% - 90% rise time(1)
--
1
μs
TFALL
90% - 10% fall time(1)
--
1
μs
-
Total jitter(2)
-
-
250
ppm
1.
The rise and fall time are not the most important parameters for the low power clock input due to the Schmitt trigger logic. It
is more important that the noise on the Low power clock line remains substantially below the hysteresis in amplitude.
2.
The total jitter is defined as the error that can appear on the actual frequency between two clock edges compared to the
perfect frequency. Due to this, the total jitter value must contain the jitter itself and the error due to the accuracy on the
clock frequency. The lower the accuracy, the smaller the jitter is allowed to be.
Table 11.
Low power clock specifications (continued)
The low power clock pin is powered by connecting BT_VIO_B to the wanted supply.
Symbol
Parameter
Min.
Typ.
Max.
Unit
Table 12.
Current consumption(1)
State
Typ.
Unit
Complete Power Down
1
μA
Deep Sleep mode
20
μA
Functional Sleep mode(2)
1.2
m
A
Sniff mode (1.28 s, 2 attempts, 0 timeouts), combined with H4 UART Deep Sleep
mode
(see section 6.10.3)
Master mode
Slave mode
55
83
μA
μA
Inquiry scan (1.28 seconds period), combined with H4 UART Deep Sleep mode
(see section 6.10.3)
318
μA
HW Page scan (1.28 seconds period), combined with H4 UART Deep Sleep mode
(see section 6.10.3)
312
μA
HW Inquiry and Page scan (1.28 seconds period), combined with H4 UART Deep
Sleep mode
(see section 6.10.3)
591
μA
Idle ACL connection (Master)
3.6
mA
Idle ACL connection (Slave)
8.2
mA
Active: audio (HV3) Master (not sniffed)
11.7
mA
Active: audio (HV3) Slave (Sniff 1.28 s, 2 attempts, 0 timeouts)
10.6
mA
Active: data (DH1) Master or Slave
(172.8 kbps asymmetrical in TX mode)
(172.8 kbps symmetrical)
23
28.5
mA



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