STA2500D datasheet(41/57 Pages) STMICROELECTRONICS

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STA2500D

Digital interfaces

Doc ID 16067 Rev 1

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Digital interfaces

7.1

The UART interface

The STA2500D contains a 4-pin (BT_UART_RXD, BT_UART_TXD, BT_UART_RTS, and

BT_UART_CTS) UART compatible with 16450, 16550 and 16750 standards. It is running up

to 4000 kbps (+1.5% / -1%).

The configuration is 8 data bits, 1 start bit, 1 stop bit, and no parity bit. The transmit and

receive paths contain a DMA function for low CPU load and high throughput. Auto RTS/CTS

is implemented in HW, controllable by SW.

The UART accepts all HCI commands as described in the Bluetooth specification, it

supports H4 proprietary commands and the Deep Sleep mode entry and wake-up through

H4 UART (see Section : Deep sleep mode entry and wake up through H4 UART). The

complete list of supported proprietary HCI commands is available upon request.

At startup, the UART baud rate is fixed at 115200 bps independently of the

BT_REF_CLK_IN frequency. A specific HCI command is provided to change the UART

baud rate when necessary within the range 9600 bps to 4000 kbps. All standard baud rates

and many other ones are supported.

7.2

The SPI interface

The physical SPI interface is made up of 5 signals: clock, chip select, data in, data out and

interrupt. When the SPI mode is selected, these signals are available through the

BT_UART/BT_SPI and BT_HOST_WAKEUP pins.

Figure 16.

SPI interface

●

SPI_CSN (on pin BT_UART_RTS/BT_SPI_CSN): chip select allows the use of multiple

Slaves (1 chip select per Slave). This signal is active low. This signal is mandatory,

even with only 1 Slave, because the Host must drive this signal to indicate SPI frames.

●

SPI_CLK (on pin BT_UART_CTS/BT_SPI_CLK): clock signal, active for a multiple of

data length cycles during an SPI transfer (SPI_CSN active). The clock is allowed to be

active when SPI_CSN is not active, in order to serve other Slaves.

●

SPI_DO (on pin BT_UART_TXD/BT_SPI_DO): data transfer from Slave to Master.

Data is generated on the negative edge of SPI_CLK by the Slave and sampled on the

Host

BT Controller

SPI_CLK

SPI_CSN

SPI_DO

SPI_DI

SPI_INT

SPI_CLK

SPI_CSN

SPI_MISO

SPI_MOSI

SPI_INT

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