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SPT7871 数据表(PDF) 3 Page - Cadeka Microcircuits LLC. |
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SPT7871 数据表(HTML) 3 Page - Cadeka Microcircuits LLC. |
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3 / 8 page ![]() 3 9/7/98 SPT7871 ELECTRICAL SPECIFICATIONS TA = +25 °C , DVCC =AVCC = +5.0 V, VEE = -5.2 V, VIN = ±1.0 V, fclock = 80 MHz, 50% clock duty cycle, unless otherwise specified. TEST TEST PARAMETERS CONDITIONS LEVEL MIN TYP MAX UNITS Dynamic Performance Signal-to-Noise + Distortion (SINAD) fIN =10 MHz I 51 53 dB fIN = 25 MHz I 51 53 dB fIN = 25 MHz fclock = 100 MHz V 50 dB fIN = 50 MHz I 47 49 dB fIN = 50 MHz fclock = 100 MHz V 47 dB Spurious Free Dynamic Range fIN = 10 MHz V 65 dB FS fIN = 25 MHz V 63 dB FS fIN = 50 MHz V 52 dB FS Two-Tone IMD Rejection2 V -65 dBc Differential Phase V 0.5 Degree Differential Gain V 1 % Power Supply Requirements AVCC Supply Voltage IV 4.75 5.0 5.25 V DVCC Supply Voltage IV 4.75 5.0 5.25 V VEE Supply Voltage IV -4.95 -5.2 -5.45 V VCC Supply Current Full Temperature VI 210 248 mA VEE Supply Current Full Temperature VI 128 151 mA Power Dissipation Full Temperature VI 1.7 2.0 W Power Supply Rejection Ratio IV 30 dB Digital Inputs LINV, MINV V CMOS/TTL Logic Clock Inputs Logic 1 Voltage (ECL) VI -1.1 V Logic 0 Voltage (ECL) VI -1.5 V Maximum Input Current Low VI -100 +100 µA Maximum Input Current High VI -100 +100 µA Pulse Width Low (CLK) IV 4.0 250 ns Pulse Width High (CLK) IV 4.0 250 ns Rise/Fall Time 20% to 80% IV 1.5 ns Digital Outputs Logic 1 Voltage (TTL) 2 mA VI 2.4 2.8 V Logic 0 Voltage (TTL) 2 mA VI 0.5 0.8 V tRise 10% to 90% V 2.0 ns tFall 10% to 90% V 2.0 ns 12048 pt FFT using distortion harmonics 2 through 10. 2Measured as a second order (f1-f2) intermodulation product from a two-tone test with each input tone at 0 dBm. TEST LEVEL CODES All electrical characteristics are subject to the following conditions: All parameters having min/max specifications are guaranteed. The Test Level column indi- cates the specific device testing actually per- formed during production and Quality Assur- ance inspection. Any blank section in the data column indicates that the specification is not tested at the specified condition. Unless otherwise noted, all tests are pulsed tests; therefore, TJ = TC = TA. TEST PROCEDURE 100% production tested at the specified temperature. 100% production tested at TA = +25 °C, and sample tested at the specified temperatures. QA sample tested only at the specified temperatures. Parameter is guaranteed (but not tested) by design and characterization data. Parameter is a typical value for information purposes only. 100% production tested at TA = +25 °C. Parameter is guaranteed over specified temperature range. TEST LEVEL I II III IV V VI |
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