Miniature, Two-Wire, True Zero Speed

Differential Peak-Detecting Sensor IC

ATS682LSH

10

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Automatic Gain Control (AGC)

AGC allows the device to operate with an optimal internal elec-

trical signal, regardless of the air gap (within the operating signal

range specification). During calibration, the device determines

the peak-to-peak amplitude of the signal generated by the target

and automatically adjusts the signal gain. Figure 5 illustrates the

effect of this feature.

Automatic Offset Adjust (AOA)

AOA circuitry automatically compensates for the effects of chip,

magnet, and installation offsets. (For capability, see Allowable

User-Induced Differential Offset, in the Operating Characteristics

table.) This circuitry is continuously active in both calibration

mode and running mode. Continuous operation of AOA allows

the IC to compensate for offset drift and for offsets induced by

temperature variations over time.

Digital Peak Detection

A digital-to-analog converter (DAC) tracks the internal analog

of the internal analog signal. In the example shown in figure 6,

the DAC would first track up with the signal and hold the upper

device hysteresis, the output switches, and the DAC begin track-

the DAC acquires the negative peak, the output again switches

this point, the DAC tracks up again and the cycle repeats. The

digital tracking of the differential analog signal allows the IC to

achieve true zero-speed operation.

Mechanical Profile

Internal Differential

Analog Signal

Response, with AGC

Internal Differential

Analog Signal

Response, without AGC

Ferrous Target

V+

V+

Device

Output Current

Internal

Differential

Analog Signal

V+

I+

Figure 5: Automatic Gain Control (AGC). The AGC function corrects for

variances in the air gap. Differences in the air gap affect the magnetic

gradient, but AGC prevents that from affecting device performance, as

shown in the lowest panel.

Figure 6. Peak detection switchpoint detail