SRAM

SRAM

SRAM

SRAM

SRAM

MT5C1001

Limited Availability

MT5C1001

Rev. 2.1 06/05

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

5

Austin Semiconductor, Inc.

ACTEST CONDITIONS

Input pulse levels ................................... Vss to 3.0V

Input rise and fall times ....................................... 5ns

Input timing reference levels ............................. 1.5V

Output reference levels ..................................... 1.5V

Output load .............................. See Figures 1 and 2

NOTES

1.

All voltages referenced to V

2.

-3V for pulse width < 20ns

3.

I

The specified value applies with the outputs

unloaded, and f =

1

Hz.

4.

This parameter is guaranteed but not tested.

5.

Test conditions as specified with the output loading

as shown in Fig. 1 unless otherwise noted.

6.

t

LZCE

, t

LZWE

, t

LZOE

, t

HZCE

, t

HZOE

and t

HZWE

are

specified with CL = 5pF as in Fig. 2. Transition is

measured ±200mV typical from steady state voltage,

allowing for actual tester RC time constant.

7.

At any given temperature and voltage condition,

t

HZCE

is less than t

LZCE

, and t

HZWE

is less than t

LZWE

and

t

HZOE

is less than t

LZOE

.

8.

WE\ is HIGH for READ cycle.

9.

Device is continuously selected. Chip enables and

output enables are held in their active state.

10. Address valid prior to, or coincident with, latest

occurring chip enable.

11. t

RC

= Read Cycle Time.

12. Chip enable (CE\) and write enable (WE\) can initiate and

terminate a WRITE cycle.

Fig. 1 Output Load

Equivalent

Fig. 2 Output Load

Equivalent

DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only)

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123

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123

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DON’T CARE

UNDEFINED

LOW Vcc DATA RETENTION WAVEFORM

V

TH

= 1.73V

Q

167

Ω

30pF

V

TH

= 1.73V

Q

167

Ω

5pF

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123

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DATA RETENTION MODE

V

4.5V

4.5V

V

DR

t

CDR

t

R

V

IH

V

IL

V

CC

CE\

DESCRIPTION

SYMBOL

MIN

MAX

UNITS

NOTES

2--

V

1.0

mA

1.5

mA

Chip Deselect to Data

Retention Time

0

--

ns

4

Operation Recovery Time

ns

4, 11

Data Retention Current

and

or < 0.2V

CONDITIONS