SRAM

SRAM

SRAM

SRAM

SRAM

MT5C1001

Limited Availability

MT5C1001

Rev. 2.1 06/05

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

4

Austin Semiconductor, Inc.

ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS

MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES

READ CYCLE

READ cycle time

20

25

35

45

ns

Address access time

20

25

35

45

ns

Chip Enable access time

20

25

35

45

ns

Output hold from address change

3333

ns

Chip Enable to output in Low-Z

3

3

3

3

ns

4, 6, 7

Chip disable to output in High-Z

8

101515

ns

4, 6, 7

Chip Enable to power-up time

0000

ns

4

Chip disable to power-down time

20

25

35

45

ns

4

WRITE CYCLE

WRITE cycle time

20

25

35

45

ns

Chip Enable to end of write

15

16

20

25

ns

Address valid to end of write

15

16

20

25

ns

Address setup time

0000

ns

Address hold from end of write

1111

ns

WRITE pulse width

15

16

20

25

ns

Data setup time

8

101315

ns

Data hold time

0000

ns

Write disable to output in Low-Z

3333

ns

7

Write Enable to output in High-Z

0

9

0

10013013

ns

4, 6, 7

-35

-45

DESCRIPTION

-20

SYMBOL

-25