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AD8120ACPZ-R7 数据表(PDF) 13 Page - Analog Devices |
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AD8120ACPZ-R7 数据表(HTML) 13 Page - Analog Devices |
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13 / 16 page ![]() AD8120 Rev. 0 | Page 13 of 16 SPI Timing Figure 21 shows the SPI 2-byte timing sequence. Table 11 lists the timing parameters for SPI. CS SCK SDI/SDO 0 0 0 0 0 C1 C0 X X D5 D4 D3D2 D1D0 Figure 21. SPI 2-Byte Timing Sequence t6 t1 t2 t4 t5 t3 CS SCK SDI R/W D1 D0 Figure 22. SPI Timing Diagram Table 11. SPI Timing Parameters Parameter Description t1 Setup time, CS to SCK t2 Clock pulse high, SCK t3 Clock pulse low, SCK t4 Setup time, SDI to SCK t5 Hold time, SDI to SCK t6 Hold time, SCK to CS I2C Timing Figure 23 shows the I2C 3-byte timing sequence. Table 12 lists the timing parameters for I2C. SDA 01 1 1 0 0 00 0 00 X X SCL Figure 23. I2C 3-Byte Timing Sequence SDA SCL t1 t2 t 3 t5 t6 t4 Figure 24. I2C Timing Diagram Table 12. I2C Timing Parameters Parameter Description t1 Setup time, SDA to SCL t2 Clock pulse high, SCL t3 Clock pulse low, SCL t4 Setup time, SDA (input) to SCL t5 Hold time, SDA (input) to SCL t6 Hold time, SCL to SDA |
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