MCP616 datasheet(17/38 Pages) MICROCHIP

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DS21613C-page 17

MCP616/7/8/9

4.4

Capacitive Loads

Driving large capacitive loads can cause stability

problems for voltage feedback op amps. As the load

capacitance increases, the feedback loop’s phase

margin decreases and the closed-loop bandwidth is

reduced. This produces gain peaking in the frequency

response, with overshoot and ringing in the step

response. A unity-gain buffer (G = +1) is the most

sensitive to capacitive loads, though all gains show the

same general behavior.

When driving large capacitive loads with these op

amps (e.g., > 60 pF when G = +1), a small series

resistor at the output (RISO in Figure 4-5) improves the

feedback loop’s phase margin (stability) by making the

output load resistive at higher frequencies. The

bandwidth will be generally lower than the bandwidth

with no capacitive load.

FIGURE 4-5:

Output Resistor, RISO

stabilizes large capacitive loads.

Figure 4-6 gives recommended RISO values for

different capacitive loads and gains. The x-axis is the

normalized load capacitance (CL/GN), where GN is the

circuit’s noise gain. For non-inverting gains, GN and the

Signal Gain are equal. For inverting gains, GN is

1+|Signal Gain| (e.g., -1 V/V gives GN =+2V/V).

FIGURE 4-6:

Recommended RISO Values

for Capacitive Loads.

After selecting RISO for your circuit, double-check the

resulting frequency response peaking and step

response overshoot. Modify RISO’s value until the

response is reasonable. Bench evaluation and

simulations with the MCP616/7/8/9 SPICE macro

model are helpful.

4.5

MCP618 Chip Select (CS)

The MCP618 is a single op amp with Chip Select (CS).

When CS is pulled high, the supply current drops to

50 nA (typical) and flows through the CS pin to VSS.

When this happens, the amplifier output is put into a

high-impedance state. By pulling CS low, the amplifier

is enabled. The CS pin has an internal 5 M

Ω (typical)

pull-down resistor connected to VSS, so it will go low if

the CS pins is left floating. Figure 1-1 shows the output

voltage and supply current response to a CS pulse.

4.6

Supply Bypass

With this family of operational amplifiers, the power

supply pin (VDD for single supply) should have a local

bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm

for good high-frequency performance. It may use a bulk

capacitor (i.e., 1 µF or larger) within 100 mm to provide

large, slow currents. This bulk capacitor is not required

and can be shared with other analog parts.

4.7

Unused Op Amps

An unused op amp in a quad package (MCP619)

should be configured as shown in Figure 4-7. These

circuits prevent the output from toggling and causing

crosstalk. Circuits A sets the op amp at its minimum

noise gain. The resistor divider produces any desired

reference voltage within the output voltage range of the

op amp; the op amp buffers that reference voltage.

Circuit B uses the minimum number of components

and operates as a comparator, but it may draw more

current.

FIGURE 4-7:

Unused Op Amps.

VIN

MCP61X

RISO

VOUT

100

1,000

10,000

1.E-11

1.E-10

1.E-09

1.E-08

Normalized Load Capacitance; CL/GN (F)

10p

100

10k

100p

GN = +1

t +2

10n

VDD

¼ MCP619 (A)

¼ MCP619 (B)

VDD

VREF

REF

-------------------

⋅

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