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MCP3425 数据表(PDF) 21 Page - Microchip Technology |
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MCP3425 数据表(HTML) 21 Page - Microchip Technology |
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21 / 38 page  © 2009 Microchip Technology Inc. DS22072B-page 21 MCP3425 TABLE 5-4: I2C SERIAL TIMING SPECIFICATIONS Electrical Specifications: Unless otherwise specified, all limits are specified for TA = -40 to +85°C, VDD = +2.7V to +5.0V, VSS = 0V, VIN+ = VIN- = VREF/2. Parameters Sym Min Typ Max Units Conditions Standard Mode (100 kHz) Clock frequency fSCL — — 100 kHz Clock high time THIGH 4000 — — ns Clock low time TLOW 4700 — — ns SDA and SCL rise time TR — — 1000 ns From VIL to VIH (Note 1) SDA and SCL fall time TF — — 300 ns From VIH to VIL (Note 1) START condition hold time THD:STA 4000 — — ns START (Repeated) condition setup time TSU:STA 4700 — — ns Data hold time TTHD:DAT 0 — 3450 ns (Note 3) Data input setup time TSU:DAT 250 — — ns STOP condition setup time TSU:STO 4000 — — ns Output valid from clock TAA 0 — 3750 ns (Note 2, Note 3) Bus free time TBUF 4700 — — ns Time between START and STOP conditions. Fast Mode (400 kHz) Clock frequency TTSCL — — 400 kHz Clock high time THIGH 600 — — ns Clock low time TLOW 1300 — — ns SDA and SCL rise time TR 20 + 0.1Cb — 300 ns From VIL to VIH (Note 1) SDA and SCL fall time TF 20 + 0.1Cb — 300 ns From VIH to VIL (Note 1) START condition hold time THD:STA 600 — — ns START (Repeated) condition setup time TSU:STA 600 — — ns Data hold time THD:DAT 0 — 900 ns (Note 4) Data input setup time TSU:DAT 100 — — ns STOP condition setup time TSU:STO 600 — — ns Output valid from clock TAA 0 — 1200 ns (Note 2, Note 3) Bus free time TBUF 1300 — — ns Time between START and STOP conditions. Note 1: This parameter is ensured by characterization and not 100% tested. 2: This specification is not a part of the I2C specification. This specification is equivalent to the Data Hold Time (THD:DAT) plus SDA Fall (or rise) time: TAA = THD:DAT + TF (OR TR). 3: If this parameter is too short, it can create an unintended Start or Stop condition to other devices on the bus line. If this parameter is too long, Clock Low time (TLOW) can be affected. 4: For Data Input: This parameter must be longer than tSP. If this parameter is too long, the Data Input Setup (TSU:DAT) or Clock Low time (TLOW) can be affected. For Data Output: This parameter is characterized, and tested indirectly by testing TAA parameter. |
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