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25LC080C 数据表(PDF) 11 Page - Microchip Technology

部件名 25LC080C
功能描述  8K SPI Bus Serial EEPROM
PDF  28 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

25LC080C 数据表(HTML) 11 Page - Microchip Technology

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© 2009 Microchip Technology Inc.
DS22151A-page 11
25XX080C/D
2.6
Write Status Register (WRSR)
Instruction
The Write Status Register (WRSR) instruction allows the
user to write to the nonvolatile bits in the STATUS reg-
ister as shown in Table 2-2. The user is able to select
one of four levels of protection for the array by writing
to the appropriate bits in the STATUS register. The
array is divided up into four segments. The user has the
ability to write-protect none, one, two or all four of the
segments of the array. The partitioning is controlled as
shown in Table 2-3.
The Write-Protect Enable (WPEN) bit is also a
nonvolatile bit that is available as an enable bit for the WP
pin. The Write-Protect (WP) pin and the Write-Protect
Enable (WPEN) bit in the STATUS register control the
programmable hardware write-protect feature. Hardware
write protection is enabled when WP pin is low and the
WPEN bit is high. Hardware write protection is disabled
when either the WP pin is high or the WPEN bit is low.
When the chip is hardware write-protected, only writes to
nonvolatile bits in the STATUS register are disabled. See
Table 2-4 for a matrix of functionality on the WPEN bit.
See Figure 2-7 for the WRSR timing sequence.
TABLE 2-3:
ARRAY PROTECTION
FIGURE 2-7:
WRITE STATUS REGISTER TIMING SEQUENCE (WRSR)
BP1
BP0
Array Addresses
Write-Protected
00
none
01
upper 1/4
(0300h-03FFh)
10
upper 1/2
(0200h-03FFh)
11
all
(0000h-03FFh)
SO
SI
CS
9
1011
12131415
0
1
0
0
0
0
00
76
5
4
21
0
Instruction
Data to STATUS Register
High-Impedance
SCK
0
2
34
56
7
18
3



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