SC9S12HY64J0CLL datasheet(53/790 Pages) FREESCALE

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MC9S12HY/HA-Family Reference Manual, Rev. 1.04

Freescale Semiconductor

Chapter 2

Port Integration Module (S12HYPIMV1)

Revision History

2.1

Introduction

2.1.1

Overview

The S12HY Family Port Integration Module establishes the interface between the peripheral modules and

the I/O pins for all ports. It controls the electrical pin properties as well as the signal prioritization and

multiplexing on shared pins.

This document covers:

•

Port A associated with the IRQ, XIRQ interrupt inputs and API_EXTCLK. Also associated with

the LCD driver output

•

Port B used as general purpose I/O and LCD driver output

•

Port R associated with 2 timer module - port 7-4 inputs can be used as an external interrupt source.

Also associated with the LCD driver output. PR also associated with the IIC

•

Port T associated with 2 timer module. Also associated with the LCD driver output. It can be used

as external interrupt source

•

Port S associated with 1 SCI module, 1 IIC module and 1 MSCAN, and PWM. Port 7-6 can be used

as an external interrupt source

•

Port P connected to the PWM, also associated with LCD driver output

•

Port H associated with 1 SPI, 1 IIC. Also associated with LCD driver output

•

Port AD associated with one 8-channel ATD module. It an be used as an external interrupt source

•

Port U/V associated with the Motor driver output. Also PV3-0 associated with 1 SPI, 1 IIC and 4

PWM channels. PU0/PU2/PU4/PU6 and PV0/PV2/PV4/PV6 associated with TIM0 channels 0 -3

and TIM1 channels 0 -3

Version

Number

Revision

Date

Effective

Date

Author

Description of Changes

01.00

12 April 2008

Initial version

01.05

18 Dec 2008

update typo for PER1AD register description

01.06

07 May 2010

correct PPSH, PPSR, PIET, PIFT, PIF1AD register description

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