CPC7581

R05

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13

battery reference voltage by two to four volts, steering

the current to ground.

Note: The CPC7581xB does not contain the

protection SCR.

2.8.2 Current Limiting function

If a lightning strike transient occurs when the device in

the talk state, the current is passed along the line to

the integrated protection circuitry and limited by the

dynamic current limit response of break switches SW1

and SW2. When a 1000V 10x1000

μs pulse

(GR-1089-CORE lightning) is applied to the line

though a properly clamped external protector, the

current seen through the break switches will be a

pulse with a typical magnitude of 2.5 A and a duration

of less than 0.5

μs.

If a power-cross fault occurs with the device in the talk

state, the current is passed though the break switches

SW1 and SW2 on to the integrated protection circuit

and is limited by the dynamic DC current limit

response of the two break switches. The DC current

limit, specified over temperature, is between 80 mA

and 425 mA, and the circuitry has a negative

temperature coefficient. As a result, if the device is

subjected to extended heating due to power cross

fault, the measured current through the break switches

(SW1 and SW2) will decrease as the device

temperature increases. If the device temperature rises

sufficiently, the temperature shutdown mechanism will

activate and the device will enter the all-off state.

2.9 External Protection Elements

The CPC7581 requires only overvoltage secondary

protection on the loop side of the device. The

integrated protection feature described above negates

the need for protection on the other (usually SLIC)

side. The secondary protector limits voltage transients

to levels that do not exceed the breakdown voltage or

input-output isolation barrier of the CPC7581. A

foldback or crowbar type protector is recommended to

minimize stresses on the device.

Consult Clare’s application note, AN-100, “Designing

Surge and Power Fault Protection Circuits for Solid

State Subscriber Line Interfaces” for equations related

to the specifications of external secondary protectors,

fused resistors and PTCs.