CPC7592MATR datasheet(18/20 Pages) CLARE

18 / 20 page

CPC7592

www.clare.com

R03

3.1.2 16-Pin DFN

3.2 Printed-Circuit Board Layout

3.2.1 16-Pin SOIC

3.2.2 16-Pin DFN

NOTE: As the metallic pad on the bottom of the DFN

package is connected to the substrate of the die, Clare

recommends that no printed circuit board traces or

vias be placed under this area to maintain minimum

creepage and clearance values.

EXPOSED

METALLIC PAD

7.00 ± 0.25

(0.276 ± 0.01)

6.00 ± 0.25

(0.236 ± 0.01)

INDEX AREA

TOP VIEW

SEATING

PLANE

SIDE VIEW

0.90 ± 0.10

(0.035 ± 0.004)

0.30 ± 0.05

(0.012 ± 0.002)

0.02, + 0.03, - 0.02

(0.0008, + 0.0012, - 0.0008)

0.20

(0.008)

4.25 ± 0.05

(0.167 ± 0.002)

0.55 ± 0.10

(0.022 ± 0.004)

6.00 ± 0.05

(0.236 ± 0.002)

BOTTOM VIEW

Dimensions

(inch)

Terminal Tip

0.80

(0.032)

2.00

(0.079)

1.27

(0.050)

(inches)

DIMENSIONS

9.40

(0.370)

0.60

(0.024)

DIMENSIONS

(inches)

5.80

(0.228)

0.35

(0.014)

1.05

(0.041)

0.80

(0.031)

CPC7592MATR 数据表(PDF) 18 Page - Clare, Inc.

CPC7592MATR 数据表(HTML) 18 Page - Clare, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

数据表下载