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ATmega48PA 数据表(PDF) 55 Page - ATMEL Corporation |
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ATmega48PA 数据表(HTML) 55 Page - ATMEL Corporation |
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55 / 448 page ![]() 55 8161D–AVR–10/09 ATmega48PA/88PA/168PA/328P Watchdog Timer will set WDIF. Executing the corresponding interrupt vector will clear WDIE and WDIF automatically by hardware (the Watchdog goes to System Reset Mode). This is useful for keeping the Watchdog Timer security while using the interrupt. To stay in Interrupt and System Reset Mode, WDIE must be set after each interrupt. This should however not be done within the interrupt service routine itself, as this might compromise the safety-function of the Watchdog System Reset mode. If the interrupt is not executed before the next time-out, a System Reset will be applied. Note: 1. WDTON Fuse set to “0” means programmed and “1” means unprogrammed. • Bit 4 - WDCE: Watchdog Change Enable This bit is used in timed sequences for changing WDE and prescaler bits. To clear the WDE bit, and/or change the prescaler bits, WDCE must be set. Once written to one, hardware will clear WDCE after four clock cycles. • Bit 3 - WDE: Watchdog System Reset Enable WDE is overridden by WDRF in MCUSR. This means that WDE is always set when WDRF is set. To clear WDE, WDRF must be cleared first. This feature ensures multiple resets during con- ditions causing failure, and a safe start-up after the failure. • Bit 5, 2..0 - WDP3..0: Watchdog Timer Prescaler 3, 2, 1 and 0 The WDP3..0 bits determine the Watchdog Timer prescaling when the Watchdog Timer is run- ning. The different prescaling values and their corresponding time-out periods are shown in Table 10-2 on page 55. Table 10-1. Watchdog Timer Configuration WDTON(1) WDE WDIE Mode Action on Time-out 1 0 0 Stopped None 1 0 1 Interrupt Mode Interrupt 1 1 0 System Reset Mode Reset 11 1 Interrupt and System Reset Mode Interrupt, then go to System Reset Mode 0 x x System Reset Mode Reset Table 10-2. Watchdog Timer Prescale Select WDP3 WDP2 WDP1 WDP0 Number of WDT Oscillator Cycles Typical Time-out at V CC = 5.0V 0 0 0 0 2K (2048) cycles 16 ms 0 0 0 1 4K (4096) cycles 32 ms 0 0 1 0 8K (8192) cycles 64 ms 0 0 1 1 16K (16384) cycles 0.125 s 0 1 0 0 32K (32768) cycles 0.25 s 0 1 0 1 64K (65536) cycles 0.5 s 0 1 1 0 128K (131072) cycles 1.0 s |
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