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MAXQ3180-RAN+ 数据表(PDF) 77 Page - Maxim Integrated Products |
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MAXQ3180-RAN+ 数据表(HTML) 77 Page - Maxim Integrated Products |
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77 / 101 page ![]() Low-Power, Multifunction, Polyphase AFE ______________________________________________________________________________________ 77 Neutral Current and Harmonics Auxiliary Channel Configuration (AUX_CFG) (0x010) The MAXQ3180 can monitor the RMS value of one auxiliary channel in addition to its normal processing. The Auxiliary Channel Configuration register selects which input the auxiliary channel processes and what processing is applied to the auxiliary channel. DSP System Configuration System Clock Frequency (SYS_KHZ) (0x012) This register contains the system clock frequency in kHz units. Because the default frequency is 8MHz, this register defaults to 0x1F40. Bit: 15 14 13 12 11 10 9 8 Name: — — — ORDH Reset: 0 0 0 0 0 0 0 0 Bit: 7 6 5 4 3 2 1 0 Name: ENHARM ENAUX — — — AUX_MUX Reset: 0 0 0 0 0 0 0 0 BIT NAME FUNCTION 15:13, 5:3 — Reserved. 12:8 ORDH Order of Harmonic (1–21). The output of harmonic voltage is read via virtual register 0x830 and current at 0x840. 7 ENHARM Enable Auxiliary Channel Harmonic Filter. When set, the auxiliary channel is processed through the harmonic filter. The parameters for this filter can be set in the B0HARM and A1HARM registers. 6 ENAUX Enable Auxiliary Channel. When set, enables auxiliary channel processing. 2:0 AUX_MUX Auxiliary Channel Input Select. This three-bit field selects the input to be processed by the auxiliary channel. 001 = IN 010 = VA 011 = IA 100 = VB 101 = IB 110 = VC 111 = IC Bit: 15 14 13 12 11 10 9 8 Name: System Clock Frequency High Byte Reset: 0x1F Bit: 7 6 5 4 3 2 1 0 Name: System Clock Frequency Low Byte Reset: 0x40 |
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