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MAXQ3181-RAN+ 数据表(PDF) 69 Page - Maxim Integrated Products |
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MAXQ3181-RAN+ 数据表(HTML) 69 Page - Maxim Integrated Products |
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69 / 84 page ![]() Low-Power, Active Energy, Polyphase AFE ______________________________________________________________________________________ 69 Neutral Current Auxiliary Channel Configuration (AUX_CFG) (0x010) The MAXQ3181 can monitor the RMS value of one auxiliary channel in addition to its normal processing. The Auxiliary Channel Configuration register selects which input the auxiliary channel processes and what processing is applied to the auxiliary channel. DSP System Configuration System Clock Frequency (SYS_KHZ) (0x012) This register contains the system clock frequency in kHz units. Because the default frequency is 8MHz, this register defaults to 0x1F40. Bit: 15 14 13 12 11 10 9 8 Name: — — — — — — — — Reset: 0 0 0 0 0 0 0 0 Bit: 7 6 5 4 3 2 1 0 Name: — ENAUX — — — AUX_MUX Reset: 0 0 0 0 0 0 0 0 BIT NAME FUNCTION 15:7 — Reserved. 6 ENAUX Enable Auxiliary Channel. When set, enables auxiliary channel processing. 2:0 AUX_MUX Auxiliary Channel Input Select. This three-bit field selects the input to be processed by the auxiliary channel. 001 = IN Bit: 15 14 13 12 11 10 9 8 Name: System Clock Frequency High Byte Reset: 0x1F Bit: 7 6 5 4 3 2 1 0 Name: System Clock Frequency Low Byte Reset: 0x40 |
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