Description

STiDP880

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Doc ID 16899 Rev 1

1

Description

The STiDP880 is an internal DisplayPort to high-speed Dual LVDS/Quad LVDS converter IC

targeted for the interconnection between a TV controller SOC and panel TCON. STiDP880

is a proposed VESA iDP compliant device, implementing a single link internal DisplayPort

input comprising four Main Link lanes and HPD, which operates without a sideband channel.

This device supports the proposed standard iDP link rate of 3.24 Gbps per lane with a total

link bandwidth of 12.96 Gbps, allowing interface connectivity for a wide range of panels up

to FHD 120 Hz and 10 bits per color. The advanced equalizer built in this device offers

robust performance over FFC and UTP type cables.

The STiDP880 supports RGB video color formats with color depth of 10 and 8 bits. This

device offers LVDS output interface configurable to map a wide range of pixel data mapping,

such as JEIDA, non-JEIDA, and VESA types. The Quad LVDS interface supports video

signals up to 400 MHz pixel rate with flexible channel and lane swapping options. In Dual

LVDS configuration, STiDP880 can support up to 300 MHz pixel rate.

The STiDP880 is designed to operate in standalone mode (without any programming from

an external microcontroller) with default configuration of four lanes DP input and QLVDS

output with non-JEIDA mapping. However, the device is configurable from an external

microcontroller through I2C host interface for custom configuration.

Figure 1.

System diagram

TV

SoC

LVDSx4

STiDP880

Panel TCON

I2C Host

Interface

iDP

4 Main Lanes

HPD