Preliminary Technical Data

AD5541A/AD5542A/AD5512AA

Rev. P

rA | Page 15 of 24

POWER-ON RESET

The AD5541/AD5542 have a power-on reset function to ensure

that the output is at a known state on power-up. On power-up,

the DAC register contains all 0s until the data is loaded from

the serial register. However, the serial register is not cleared on

power-up, so its contents are undefined. When loading data

initially to the DAC, 16 bits or more should be loaded to prevent

erroneous data appearing on the output. If more than 16 bits are

loaded, the last 16 are kept, and if less than 16 bits are loaded,

bits remain from the previous word. If the AD5541/ AD5542

need to be interfaced with data shorter than 16 bits, the data

should be padded with 0s at the LSBs.

POWER SUPPLY AND REFERENCE BYPASSING

For accurate high-resolution performance, it is recommended

that the reference and supply pins be bypassed with a 10 μF

tantalum capacitor in parallel with a 0.1 μF ceramic capacitor.