HT82K74EE datasheet(21/56 Pages) HOLTEK

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HT82K74E/HT82K74EE

Rev. 1.00

December 15, 2009

must also be noted that to read the contents of the low

byte register, a read to the high byte register must first

be executed to latch the contents of the low byte buffer

from its associated low byte register. After this has been

done, the low byte register can be read in the normal

way. Note that reading the low byte timer register di-

rectly will only result in reading the previously latched

contents of the low byte buffer and not the actual con-

tents of the low byte timer register.

Timer Control Register

- TMRC

The flexible features of the Holtek microcontroller

Timer/Event Counters enable them to operate in three

different modes, the options of which are determined by

the contents of the Timer Control Register TMRC. To-

gether with the TMRL and TMRH registers, these three

registers control the full operation of the Timer/Event

Counter. Before the timer can be used, it is essential that

the TMRC register is fully programmed with the right

data to ensure its correct operation, a process that is

normally carried out during program initialisation.

To choose which of the three modes the timer is to oper-

ate in, the timer mode, the event counting mode or the

pulse width measurement mode, bits TM0 and TM1

must be set to the required logic levels. The timer-on bit

TON or bit 4 of the TMRC register provides the basic

on/off control of the timer, setting the bit high allows the

counter to run, clearing the bit stops the counter. If the

timer is in the event count or pulse width measurement

mode the active transition edge level type is selected by

the logic level of the TE or bit 3 of the TMRC register.

Configuring the Timer Mode

In this mode, the timer can be utilised to measure fixed

time intervals, providing an internal interrupt signal each

time the counter overflows. To operate in this mode, bits

TM1 and TM0 of the TMRC register must be set to 1 and

0 respectively. In this mode, the internal clock is used as

the timer clock. The timer-on bit, TON, must be set high

to enable the timer to run. Each time an internal clock

high to low transition occurs, the timer increments by

one. When the timer is full and overflows, the timer will

be reset to the value already loaded into the preload reg-

ister and continue counting. If the timer interrupt is en-

abled, an interrupt signal will also be generated. The

timer interrupt can be disabled by ensuring that the ETI

bit in the INTC register is cleared to zero.

Note: The timer overflow can

¢t wake-up the MCU from

Power Down Mode.

T i m e r / E v e n t C o u n t e r C o n t r o l R e g i s t e r

b 7

T E

T O N

T M 0

T M 1

b 0

T o e n a b l e o r d i s a b l e t i m e r c o u n t i n g

1 : e n a b l e

0 : d i s a b l e

O p e r a t i n g m o d e s e l e c t

T M 1

T M 0

n o m o d e a v a i l a b l e

e v e n t c o u n t e r m o d e ( e x t e r n a l c l o c k )

t i m e r m o d e ( i n t e r n a l c l o c k )

p u l s e w i d t h m e a s u r e m e n t m o d e

T o d e f i n e t h e a c t i v e e d g e o f T M R p i n i n p u t s i g n a l

1 : a c t i v e o n h i g h t o l o w

0 : a c t i v e o n l o w t o h i g h

N o t i m p l e m e n t e d , r e a d a s " 0 "

Timer/Event Counter Control Register

I n c r e m e n t

T i m e r C o u n t e r

f S Y S / 4

T i m e r + 1

T i m e r + 2

T i m e r + N

T i m e r + N + 1

Timer Mode Timing Chart

HT82K74EE 数据表(PDF) 21 Page - Holtek Semiconductor Inc

HT82K74EE 数据表(HTML) 21 Page - Holtek Semiconductor Inc

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