MPC5634M datasheet(7/118 Pages) FREESCALE

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Overview

MPC5634M Microcontroller Data Sheet, Rev. 4

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

— Configurable bus speed modes

— Bus monitor

— Configurable wait states

•

System integration unit (SIU)

— Centralized GPIO control of 80 I/O pins

— Centralized pad control on a per-pin basis

– Pin function selection

– Configurable weak pull-up or pull-down

– Drive strength

–Slew rate

– Hysteresis

— System reset monitoring and generation

— External interrupt inputs, filtering and control

— Critical Interrupt control

— Non-Maskable Interrupt control

— Internal multiplexer subblock (IMUX)

– Allows flexible selection of eQADC trigger inputs (eTPU, eMIOS and external signals)

– Allows selection of interrupt requests between external pins and DSPI

•

Error correction status module (ECSM)

— Configurable error-correcting codes (ECC) reporting

•

On-chip flash memory

— Up to 1.5 MB flash memory, accessed via a 64-bit wide bus interface

— 16 KB shadow block

— Fetch Accelerator

– Provide single cycle flash access @ 80 MHz

– Quadruple 128-bit wide prefetch/burst buffers

– Prefetch buffers can be configured to prefetch code or data or both

— Censorship protection scheme to prevent flash content visibility

— Flash divided into two independent arrays, allowing reading from one array while erasing/programming the other

array (used for EEPROM emulation)

— Memory block:

– For MPC5634M: 18 blocks (4

× 16 KB, 2 × 32 KB, 2 × 64 KB, 10 × 128 KB)

– For MPC5633M: 14 blocks (4

× 16 KB, 2 × 32 KB, 2 × 64 KB, 6 × 128 KB)1

– For MPC5632M: 12 blocks (4

× 16 KB, 2 × 32 KB, 2 × 64 KB, 4 × 128 KB)

— Hardware programming state machine

•

On-chip static RAM

— For MPC5634M: 94 KB general purpose RAM of which 32 KB are on standby power supply

— For MPC5633M: 64 KB general purpose RAM of which 24 KB are on standby power supply2

— For MPC5632M: 48 KB general purpose RAM of which 24 KB are on standby power supply

•

Boot assist module (BAM)

— Enables and manages the transition of MCU from reset to user code execution in the following configurations:

– Execution from internal flash memory

1. Revision 1 of the MPC5633M has a different flash memory organization: 10 blocks (2

× 16 KB, 2 × 48 KB, 2 × 64 KB, 2 ×

128 KB, 2

× 256 KB).

2. Revision 1 of the MPC5633M has a different RAM organization: 48 KB general-purpose RAM, of which 24 KB are on the

standby power supply.

MPC5634M 数据表(PDF) 7 Page - Freescale Semiconductor, Inc

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