MPC5634M datasheet(8/118 Pages) FREESCALE

8 / 118 page

MPC5634M Microcontroller Data Sheet, Rev. 4

Preliminary—Subject to Change Without Notice

Overview

Freescale Semiconductor

– Execution from external memory on the calibration bus

– Download and execution of code via FlexCAN or eSCI

•

Periodic interrupt timer (PIT)

— 32-bit wide down counter with automatic reload

— Four channels clocked by system clock

— One channel clocked by crystal clock

— Each channel can produce periodic software interrupt

— Each channel can produce periodic triggers for eQADC queue triggering

— One channel out of the five can be used as wake-up timer to wake device from low power stop mode

•

System timer module (STM)

— 32-bit up counter with 8-bit prescaler

— Clocked from system clock

— Four-channel timer compare hardware

— Each channel can generate a unique interrupt request

— Designed to address AutoSAR task monitor function

•

Software watchdog timer (SWT)

— 32-bit timer

— Clock by system clock or crystal clock

— Can generate either system reset or non-maskable interrupt followed by system reset

— Enabled out of reset

•

Enhanced modular I/O system (eMIOS)

— 16 timer channels (up to 14 channels in 144 LQFP)

— 24-bit timer resolution

— Supports a subset of the timer modes found in eMIOS on MPC5554

— 3 selectable time bases plus shared time or angle counter bus from eTPU2

— DMA and interrupt request support

— Motor control capability

•

Second-generation enhanced time processor unit (eTPU2)

— Compatible with eTPU—no changes are required to hardware or software if only eTPU features are used

— Intelligent co-processor designed for timing control

— High level tools, assembler and compiler available

— 32 channels (each channel has dedicated I/O pin in all packages)

— 24-bit timer resolution

— 14 KB code memory and 3 KB data memory

— Double match and capture on all channels

— Angle clock hardware support

— Shared time or angle counter bus with eMIOS

— DMA and interrupt request support

— Nexus Class 1 debug support

— eTPU2 enhancements

– Counters and channels can run at full system clock speed

– Software watchdog

– Real-time performance monitor

– Instruction set enhancements for smaller more flexible code generation

– Programmable channel mode for customization of channel operation

MPC5634M 数据表(PDF) 8 Page - Freescale Semiconductor, Inc

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